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How Healthy is the Health related Informations brocated by TV News? (TV 뉴스에 보도된 건강관련 정보의 건강성과 해독성)

  • Kim, Shin-Jeong;Lee, Jung-Eun;Kim, Shin-Dong
    • Research in Community and Public Health Nursing
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    • v.12 no.2
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    • pp.513-531
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    • 2001
  • Television news programs are becoming significant source of health information. This study aims at investigating the current state of health coverage of the prime time news program in Korea. Data were collected from KBS 9 0'clock news in the period of thirteen months. from December 1. 1998. to November 1. 1999. The data were analyzed using content analysis method. and the reliability degree was 99.7% according to the Holsti's inter-coder reliability test. The current research classified 489 health related news items into 49 sub-categories and five health categories through content analysis. Some of the basic results of this study are as follows. 1. The frequency according to health category, health maintenance promotion(57.3%) topped followed by disease prevention(23.2%), disease treatment(14.9%), life ethics(4.0%), and growth development(0.6%). 2. According to human developmental age. for the most part(80.1 %) is applicable to the entire range of human developmental age. 3. Health maintennance promotion category take top of health category by the rate of 57.3% and contain 20 sub-categories. 4. News items in the life ethics category, which had six sub-categories. occupied only four percent of the total health related news. News in the growth development category included two sub categories and occupied 0.6% of the total news items. 5. In disease prevention and disease treatment category, infectious disease(33.2%) showed the highest percentage according to the WHO's international disease classification system. Disease prevention occupied 23.2% and contained eleven sub-categories while disease treatment occupied 14.9% and included ten sub-categories. Television news coverage on health showed a wide variety of selection in terms that they are reporting various issues. This study, however, found that some news items were confusing and failing in presenting scientific evidences. It is suggested that the television coverage on health could be beneficial to most of viewers in receiving important health information and guidelines, only if they are utilizing their own sound discretion in consuming those news.

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Hardware Design of Arccosine Function for Mobile Vector Graphics Processor (모바일 벡터 그래픽 프로세서용 역코사인 함수의 하드웨어 설계)

  • Choi, Byeong-Yoon;Lee, Jong-Hyoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.4
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    • pp.727-736
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    • 2009
  • In this paper, the $arccos(cos^{-1})$ arithmetic unit for mobile graphics accelerator is designed. The mobile vector graphics applications need tight area, execution time, power dissipation, and accuracy constraints compared to desktop PC applications. The designed processor adopts 2nd-order polynomial approximation scheme based on IEEE floating point data format to satisfy speed and accuracy conditions and reduces area via hardware sharing structure. The arccosine processor consists of 15,280 gates and its estimated operating frequency is about 125Mhz at operating condition of $0.35{\mu}m$ CMOS technology. Because the processor can execute arccosine function within 7 clock cycles, it has about 17 MOPS(million arccos operations per second) execution rate and can be applicable to mobile OpenVG processor. And because of its flexible architecture, it can be applicable to the various transcendental functions such as exponential, trigonometric and logarithmic functions via replacement of ROM and minor hardware modification.

Design of High Speed Binary Arithmetic Encoder for CABAC Encoder (CABAC 부호화기를 위한 고속 이진 산술 부호화기의 설계)

  • Park, Seungyong;Jo, Hyungu;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.4
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    • pp.774-780
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    • 2017
  • This paper proposes an efficient binary arithmetic encoder hardware architecture for CABAC encoding, which is an entropy coding method of HEVC. CABAC is an entropy coding method that is used in HEVC standard. Entropy coding removes statistical redundancy and supports a high compression ratio of images. However, the binary arithmetic encoder causes a delay in real time processing and parallel processing is difficult because of the high dependency between data. The operation of the proposed CABAC BAE hardware structure is to separate the renormalization and process the conventional iterative algorithm in parallel. The new scheme was designed as a four-stage pipeline structure that can reduce critical path optimally. The proposed CABAC BAE hardware architecture was designed with Verilog HDL and implemented in 65nm technology. Its gate count is 8.07K and maximum operating speed of 769MHz. It processes the four bin per clock cycle. Maximum processing speed increased by 26% from existing hardware architectures.

Implementation of a LSB-First Digit-Serial Multiplier for Finite Fields GF(2m) (유한 필드 GF(2m)상에서의 LSB 우선 디지트 시리얼 곱셈기 구현)

  • Kim, Chang-Hun;Hong, Chun-Pyo;U, Jong-Jeong
    • The KIPS Transactions:PartA
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    • v.9A no.3
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    • pp.281-286
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    • 2002
  • In this paper we, implement LSB-first digit-serial systolic multiplier for computing modular multiplication $A({\times})B$mod G ({\times})in finite fields GF $(2^m)$. If input data come in continuously, the implemented multiplier can produce multiplication results at a rate of one every [m/L] clock cycles, where L is the selected digit size. The analysis results show that the proposed architecture leads to a reduction of computational delay time and it has more simple structure than existing digit-serial systolic multiplier. Furthermore, since the propose architecture has the features of regularity, modularity, and unidirectional data flow, it shows good extension characteristics with respect to m and L.

Design of a tracking and demodulation circuit for wideband DDMA in IMT-2000 (IMT-2000 광대역 CDMA의 동기추적 및 데이터 복조 회로구현)

  • 권형철;오현서;이재호;조경록
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.6A
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    • pp.871-880
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    • 1999
  • In this paper, a pseudo-noise(PN) tracking and demodulation circuits are analyzed and designed for a direct-sequence/spread-spectrum multiple access system under a mobile fading channel. We consider noncoherent delay locked loop(DLL) as a PN code tracking loop which has 1/8 PN chip resolution. The tracking performance of DLL is evaluated in terms of locking time from a loose state and tracking jitter. The received signal is demodulated to original data by despreading with PN code locked by DLL. Also the designed circuit supports sound service of 32Kbps and in-band signal with 4.096MHz chip clock. The circuits are implemented and verified with FPGA, which is shown completely data recovery under AWGN 7dB and will be available for IMT-2000.

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A Study on preference of Italian Cuisine (이태리 요리의 선호도 분석 및 운영개선방안에 관한 연구 )

  • 정진우
    • Culinary science and hospitality research
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    • v.2
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    • pp.169-181
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    • 1996
  • Today we are inclined to dine out more frequently according as the national income is increased and Women enter into the Social life, 'This tendency results in the universality of foodculture and the food made of fresh food stuff as well as the Pollution-free food is preferable as everyone warits to eat natural food or health food and escapes from the pollution. Moreover we have socail problems like fatress and adult disease which result from the small amount of activity or the food with high calory and high gat. under this circumstance. the most adeguate food seems to be Italian good. It stand in the spottight of food world and is most preferable for everyone today. The sphere of food and beverage has a low value-added-rate compartry to the high increasing rate of customers and profit, so, the efficient managing method for the cost of food and beverage and the operating skill in the kitchen are the principal factors leading to success or failure. Therefore, this research is to show some remedies as follows, pointing out the operating problems of an selected Italian restaurant at the top class hotel. First, most Italian restaurant at the hotel are located in the best place and investing the big capital, But they are open for only 8 hours through a day. This should be improved not to bring a enormous loss to the hotel The brealefast menus such as vegetables or fish food, pizza and pasta which modern man can easily enjoy should be developed open the restaurants for morning gours. Second, the business hours are not made continously. As a result, all the emplyees should stay in the company all day long without taking any advantage of the losed time, This will be the loss for both the company and the employees, By veloping the morning menus, employees shald be classified into morning and afternoon staffs and the opening and closing hour at 3 and 6 O'clock should be used so that minimum number of employees may operate the company. Third, the characteristic of Italian food is in the use of fresh food stuff, The proper purchase of food stuff and the simple distributing system will help Italian restaurant show its character istcc as a hzgh-grade restaurant. Fourth, the most popular Italian food such as pizza or pasta should be market with Priority.

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A Study on the Development of Barcode Laser Scanner Using Optical Information Processing (광 정보처리를 이용한 바코드 레이저 스캐너 개발연구)

  • Shin, Kwang-Yong;Ihm, Jong-Tae;Eun, Jae-Jung;Kim, Nam;Park, Han-Kyu
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.1
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    • pp.69-77
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    • 1989
  • A hologram scanner for POS bar code symb9ol readers has been developed. This system is composed of scanning optics, optical detector, video signal circuitary and preprocessor. In contrast to conventional scanners using polygonal mirrors, which complicate the scanning optics, the hologram scanner developed in this research was made up with simple optics and higher reading performance was achieved. And in order to read abar code symbol omnidirectionally with highdensity scan patterns, the new real time decoding technique was proposed. The advantage of this technique is less hardware and lower clock rate. High speed processing and improved readability for tilted symbol was confirmed experimentally.

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A Study on the Y2K Bug Solution of IBM Compatible PC (IBM 호환 PC에서의 Y2K 문제 해결 방안에 대한 연구)

  • Kim, Soo-In;Lee, Jae-Soo;Park, Lee-Bum
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.36T no.4
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    • pp.115-122
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    • 1999
  • The Y2K bug, what is called "millennium bug" or "2000 year bug", take place because the year after 2000 year is not recognize as the year marking method of the computer designed for take up two-digit number. This takes place because the RTC chip architecture of PC can not change the century information to the operating together with date. In this paper, we make an analysis about Y2K hardware bug of RTC in the IBM compatible PC, and make a Y2K compensation board in order to solve Y2K hardware bug. And the test results by various Y2K diagnosis program is bug before put in Y2K compensation board, but is not bug after put in Y2K compensation board. Therefore, we suggest a solution method for Y2K hardware bug of RTC in the IBM compatible PC.

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An Effective Cache Test Algorithm and BIST Architecture (효율적인 캐쉬 테스트 알고리듬 및 BIST 구조)

  • Kim, Hong-Sik;Yoon, Do-Hyun;Kang, Sing-Ho
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.12
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    • pp.47-58
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    • 1999
  • As the performance of processors improves, cache memories are used to overcome the difference of speed between processors and main memories. Generally cache memories are embedded and small sizes, fault coverage is a more important factor than test time in testing point of view. A new test algorithm and a new BIST architecture are developed to detect various fault models with a relatively small overhead. The new concurrent BIST architecture uses the comparator of cache management blocks as response analyzers for tag memories. A modified scan-chain is used for pre-testing of comparators which can reduce test clock cycles. In addition several boundary scan instructions are provided to control the internal test circuitries. The results show that the new algorithm can detect SAFs, AFs, TFs linked with CFs, CFins, CFids, SCFs, CFdyns and DRFs models with O(12N), where N is the memory size and the new BIST architecture has lower overhead than traditional architecture by about 11%.

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Design of a High Performance Built-In Current Sensor using 0.8$\mu\textrm{m}$ CMOS Technology (0.8$\mu\textrm{m}$ CMOS 공정을 이용한 고성능 내장형 전류감지기의 구현)

  • 송근호;한석붕
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.12
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    • pp.13-22
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    • 1998
  • In this paper, we propose a high-performance BICS(built-in current sensor) which is fabricated in 0.8${\mu}{\textrm}{m}$ single-poly two-metal process for IDDQ testing of CMOS VLSI circuit. The CUT(circuit under test) is 4-bit full adder with a bridging fault. Using two nMOSs that have different size, two bridging faults that have different resistance values are injected in the CUT. And controlling a gate node, we experimented various fault effects. The proposed BICS detects the faulty current at the end of the clock period, therefore it can test a CUT that has a much longer critical propagation delay time and larger area than conventional BICSs. As expected in the HSPICE simulation, experimental results of fabricated chip demonstrated that the proposed BICS can exactly detect bridging faults in the circuit.

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