• Journal of the korean academy of Pediatric Dentistry
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• v.44 no.1
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• pp.64-71
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• 2017

This study was designed to evaluate the age, gender, location of trauma, etiology, injury site, types of treatment, elapsed time after trauma, and arrival time of children who visited trauma center of Wonju Severance Christian Hospital. Records of a total of 841 patients who were 0 - 15 years old and received care in the period from March 2011 to October 2015 at the Trauma Center, Wonju Severance Christian Hospital were analyzed. This study showed that traumatic dental injuries were more common in boys and patients between 0 - 3 years old. Under 6 years old, fall was the most common etiology and home was the most common place of trauma. However, fall decreased, and sports and etc increased largely in etiologic factors over 6 years old. Besides, home decreased, and road and kindergarten school increased largely in the place of trauma. Etiology and location of trauma were statistically influenced by the age (p < 0.05). The most commonly affected injury sites were maxillary incisors and lips. The most patients visited trauma center between 18 - 24 o'clock (53.3%), and the least patients visited between 0 - 6 o'clock (4.6%). 51.5% of patients visited the trauma center within 1 hour of sustaining trauma, and 26.8% and 11.5% of patients visited between 1 - 2 hours and 2 - 3 hours respectively. The most common treatment of traumatic dental injuries was observation, and the second most common treatment was suture. Traumatic dental injuries in children exhibit specific epidemiological features according to children's gender, age, and other conditions. These result from combination of social, developmental, and physiologic factors.

• Journal of Broadcast Engineering
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• v.17 no.2
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• pp.374-387
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• 2012

In this paper, we implement a new hardware for finding the significant coefficients of a digital hologram and ciphering them using discrete wavelet packet transform (DWPT). Discrete wavelet transform (DWT) and packetization of subbands is used, and the adopted ciphering technique can encrypt the subbands with various robustness based on the level of the wavelet transform and the threshold of subband energy. The hologram encryption consists of two parts; the first is to process DWPT, and the second is to encrypt the coefficients. We propose a lifting based hardware architecture for fast DWPT and block ciphering system with multi-mode for the various types of encryption. The unit cell which calculates the repeated arithmetic with the same structure is proposed and then it is expanded to the lifting kernel hardware. The block ciphering system is configured with three block cipher, AES, SEED and 3DES and encrypt and decrypt data with minimal latency time(minimum 128 clocks, maximum 256 clock) in real time. The information of a digital hologram can be hided by encrypting 0.032% data of all. The implemented hardware used about 200K gates in $0.25{\mu}m$ CMOS library and was stably operated with 165MHz clock frequency in timing simulation.

• Journal of Bio-Environment Control
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• v.15 no.3
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• pp.225-230
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• 2006

Tomatoes were experimented in perlite bags for various irrigation control methods to elucidate the efficient method for nutrient solution management. The irrigation control methods were for 3 different types such as control by drainage level sensor (PROBE), control by integrated solar radiation (ISR), and control by time clock (Timer). The substrate weight was maintained stably in the proper range in PROBE treatment, regardless of daily solar radiations or growth stages. The bed weights in the treatments of ISR and Timer were changed largely. Growth as well as total yield was the highest in PROBE treatment. There was no difference in soluble solids (Brix %) among the treatments. Consequently, ISR control could be useful only with appropriate timer control and also calibration. Control by drainage level sensor was suggested to be the most satisfactory as irrigation management method.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.5
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• pp.563-569
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• 2018

This paper is on the implementation of a system for automatically monitoring window farm hydroponics based on Arduino (utilizing Arduino's open source code) emerging as the icon of the Fourth Industrial Revolution. A window farm, which means window-type hydroponics, is offered as an alternative to fulfill the desires of people who want to grow plants aside from the busy daily life in the city. The system proposed in this paper was developed to automatically monitor a window farm hydroponics cultivation environment using the Arduino UNO board, a four-charmel motor shield, temperature and humidity sensors, illumination sensors, and a real-time clock module. Modules for hydroponics have been developed in various forms, but power consumption is high because most of them use general power and motors. Since it is not a system that is monitored automatically, there is a disadvantage in that an administrator always has to manage its operational state. The system is equipped with a water supply that is most suitable for a plant growth environment by utilizing temperature, humidity, and light sensors, which function as Internet of Things sensors. In addition, the real-time clock module can be used to provide a more appropriate water supply. The system was implemented with sketch code in a Linux environment using Raspberry Pi 3 and Arduino UNO.

• Journal of Advanced Navigation Technology
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• v.20 no.5
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• pp.425-432
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• 2016

When user estimates user's position, GPS positions can be obtained from the navigation message transmitted from the GPS. However, the broadcast ephemeris cannot be used in the applications required high-level accuracies because it can cause errors of several meters. To correct satellite positions and clocks, user can use RTS corrections provided by IGS. In this paper, the accuracy of broadcast and RTS corrections are analyzed by comparing with the IGS final for 3-months. The RTS errors are analyzed for each user's locations and satellite blocks. The correlations between errors and shadow condition, and solar and geomagnetic activities are analyzed. The latency is applied to the RTS corrections, and these are extrapolated by polynomial. Then, the extrapolated RTS are compared with true RTS. The single-day performances of the PPP by broadcast ephemeris and RTS corrected ephemeris are analyzed. As a result, RTS 3D orbit and clock errors are 1/20 and 1/3 less than broadcast ephemeris errors. 3D positioning error of the RTS is 1/5 less than that of broadcast ephemeris.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.1
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• pp.74-84
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• 2007

This paper presents a new dual-loop Delay Locked Loop(DLL) to expand the delay lock range of a conventional DLL. The proposed dual-loop DLL contains a Coarse_loop and a Fine_loop, and its operation utilizes one of the loops selected by comparing the initial time-difference among the reference clock and 2 internal clocks. The 2 internal clock signals are taken, respectively, at the midpoint and endpoint of a VCDL and thus are $180^{\circ}$ separated in phase. When the proposed DLL is out of the conventional lock range, the Coarse_loop is selected to push the DLL in the conventional lock range and then the Fine_loop is used to complete the locking process. Therefore, the proposed DLL is always stably locked in unless it is harmonically false-locked. Since the VCDL employed in the proposed DLL needs two control voltages to adjust the delay time, it uses TG-based inverters, instead of conventional, multi-stacked, current-starved inverters, to compose the delay line. The new VCDL provides a wider delay range than a conventional VCDL In overall, the proposed DLL demonstrates a more than 2 times wider lock range than a conventional DLL. The proposed DLL circuits have been designed, simulated and proved using 0.18um, 1.8V TSMC CMOS library and its operation frequency range is 100MHz${\sim}$1GHz. Finally, the maximum phase error of the DLL locked in at 1GHz is less than 11.2ps showing a high resolution and the simulated power consumption is 11.5mW.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.593-596
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• 2018

The speed of vehicles has remained a significant factor that influences the severity of accidents and traffic accident rate in many parts of the world including South Korea. This behavior where drivers drive at speeds which exceed a posted safe threshold is known as 'speeding'. Over the past twenty years, the Korean National Police Agency (NPA) has become aware of an increased frequency of drivers who are speeding. Therefore, fixed-type ASE systems [1] have been installed on hazardous road sections of many highways. These system monitor vehicle speeds using a camera. However, the use of ASE systems has changed the behavior of the drivers. Specifically, drivers reduce speed or avoid the route where the cameras are mounted. It is not practical to install cameras at every possible location. Therefore, it is challenging to thoroughly explore the location where speeding occurs. In view of these problems, the author of this paper designed and implemented a prototype visualization system in which point and color are used to show vehicle location and associated over-speed information. All of this information was used to create a comprehensive visualization application to show information about vehicle driving. In this paper, we present an approach detecting vehicles moving at speeds which exceed a threshold and visualizing the points those violations occur on a map. This was done using vehicle trajectory data collected in Daegu city. We propose steps for exploring the data collected from those sensors. The resulting mapping has two layers. The first layer contains the dynamic vehicle trajectory data. The second underlying layer contains the static road networks. This allows comparing the speed of vehicles on roads with the known maximum safe speed of those roads, and presents the results with a visualization tool. We also compared data about people who drive over threshold safe speeds on each road on days and weekends based on vehicle trajectories. Finally, our study suggests improved times and locations where law enforcement should use monitoring with speed cameras, and where they should be stricter with traffic law enforcement. We learned that people will drive over the speed limit at midnight more than 1.9 times as often when compared with rush hour traffic at 8 o'clock in the morning, and 4.5 times as often when compared with traffic at 7 o'clock in the evening. Our study can benefit the government by helping them select better locations for installation of speed cameras. This would ultimately reduce police labor in traffic speed enforcement, and also has the potential to improve traffic safety in Daegu city.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2A
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• pp.137-146
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• 2005

IP-based design methodology has been popularly employed for SoC design to reduce design complexity and to cope with time-to-market pressure. Interface modules for communication between system buses and IPs are required, since many IPs employ different protocols. Automatic generation of these interface modules would enhance designer's productivity and IP's reusability. This paper proposes an automatic interface generation system based on FSM generated from the protocol description of IPs. The proposed system provides the library modules for the standard buses to reduce the burdens of describing the protocols for data transfer from/to standard buses. Experimental results show that the area of the interface circuits generated by the proposed system had been increased slightly by 4.5% on the average when compared to manual designs. In the experiment, where bus clock is 100 Mhz and slave module clock is 34 Mhz, the latency of the interface had been increased by 7.1% in burst mode to transfer 16 data words. However, occupation of system bus can be reduce by 64.9%. A chip designer can generate an interface that improves the efficiency of system bus, by using this system.

• The KIPS Transactions:PartA
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• v.10A no.3
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• pp.247-254
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• 2003

This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

• Journal of Advanced Navigation Technology
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• v.24 no.2
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• pp.92-100
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• 2020

Satellite-based argumentation systems (SBAS) is a system that enhances the accuracy, integrity, availability and continuity of GNSS navigation users by using geostationary orbit (GEO) satellites to send correction information and the failures of global navigation satellite system (GNSS) satellites in the form of messages. The correction information provided by SBAS is pseudorange error, satellite orbit error, clock error, and ionospheric delay error at 250 bps. Therefore, A lot of message processing are required for the SBAS navigation. There is a need to reduce SBAS time to first fix (TTFF) for using SBAS navigation in systems with short operating time. In this paper, A-SGNSS operation method was proposed for reducing SBAS TTFF. Also, A-SGNSS TTFF and availability were analyzed.