• Journal of the Korean Vacuum Society
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• v.12 no.S1
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• pp.33-35
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• 2003

The electrooptic properties of the reflected light in a reflective mode, $45^{\circ}C$twisted nematic liquid crystal (TNLC) cell were investigated in the voltage regions near and away from the Freedericksz transition threshold. The measured reflectivity away from the threshold voltage ($V_th$) could not be described by the model which assurnes a constant tilt angle as well as a linearized distribution of twist angle across the cell, although the data are well fitted near $V_th$. We found that in the voltage region away from $V_th$, the model considering the distributions of the tilt angle and the twist angle should be applied for the calculation of the reflectivity. The director-axis distributions were obtained from the numerical integration of the Euler-Lagrange equation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.12
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• pp.2281-2285
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• 2011

An algorithm for extracting SPICE MOS level 2 model parameters for the high voltage MOSFET DC model is proposed. The optimization method for analyzing the nonlinear data of the current-voltage curve using the Gauss-Newton algorithm is proposed and the pre-process step for calculating the threshold voltage and the mobility is proposed. The drain current obtained from the proposed method shows the maximum relative error of 5.6% compared with the drain current of 2-dimensional device simulation for the high voltage MOSFET.

• Journal of Satellite, Information and Communications
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• v.8 no.3
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• pp.10-14
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• 2013

In this paper, when applying current-mode circuit design technique showing constant power dissipation none the less operation frequency, to the low power design of dynamic voltage frequency scaling, we introduce the low power current-mode circuit design technique applying MOSFET in sub-threshold region, in order to solve the problem that has large power dissipation especially on the condition of low operating frequency. BSIM 3, was used as a MOSFET model in circuit simulation. From the simulation result, the power dissipation of the current memory circuit with sub-threshold MOSFET showed $18.98{\mu}W$, which means the consumption reduction effect of 98%, compared with $900{\mu}W$ in that with strong inversion. It is confirmed that the proposed circuit design technique will be available in DVFS using a current-mode circuit design.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.76-81
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• 2007

Threshold voltage ($V_{th}$) modeling of doublegate (DG) MOSFETs was performed, for the first time, by considering barrier lowering in the short channel devices. As the gate length of DG MOSFETs scales down, the overlapped charge-sharing length ($x_h$) in the channel which is related to the barrier lowering becomes very important. A fitting parameter ${\delta}_w$ was introduced semi-empirically with the fin body width and body doping concentration for higher accuracy. The $V_{th}$ model predicted well the $V_{th}$ behavior with fin body thickness, body doping concentration, and gate length. Our compact model makes an accurate $V_{th}$ prediction of DG devices with the gate length up to 20-nm.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.2
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• pp.8-13
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• 1999

In this paper, an analytical threshold voltage model is proposed by replacing the conventional GCA(Gradual Channel Approximation) with the assumption that a normal depletion layer width in the intrinsic region will vary quasi-linearly according to the channel direction. Derived threshold voltage expression is written as a function of the effective channel length, drain voltage, substrate bias voltage, substrate doping concentration, and the oxide thickness. Calculated results show almost similar trends with BSIM3v3's results in a satisfactory accuracy.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.11
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• pp.2373-2377
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• 2009

In this paper, the threshold voltage characteristics have been analyzed using three dimensional Poisson's equation for FinFET. The FinFET is extensively been studing since it can reduce the short channel effects as the nano device. We have presented the short channel effects such as subthreshold swing and threshold voltage for PinFET, using the analytical three dimensional Poisson's equation. We have analyzed for channel length, thickness and width to consider the structural characteristics for FinFET. Using this model, the subthreshold swing and threshold voltage have been analyzed for FinFET since the potential and transport model of this analytical three dimensional Poisson's equation is verified as comparing with those of the numerical three dimensional Poisson's equation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.928-930
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• 2009

In this paper, the threshold voltage characteristics have been alanyzed using three dimensional Poisson's equation for FinFET. The FinFET is extensively been studing since it can reduce the short channel effects as the nano device. We have presented the short channel effects such as subthreshold swing and threshold voltage for FinFET, using the analytical three dimensional Poisson's equation. We have analyzed for channel length, thickness and width to consider the structural characteristics for FinFET. Using this model, the subthreshold swing and threshold voltage have been analyzed for FinFET since the potential and transport model of this analytical three dimensional Poisson's equation is verified as comparing with those of the numerical three dimensional Poisson's equation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.683-685
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• 2012

This paper have presented the analysis of the change for threshold voltage and drain induced barrier lowering among short channel effects occurred in subthreshold region for double gate(DG) MOSFET with two gates to be next-generation devices, based on scaling theory. To obtain the analytical solution of Poisson's equation, Gaussian function been used as carrier distribution to analyze closely for experimental results, and the threshold characteristics have been analyzed for device parameters such as channel thickness and doping concentration and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold chatacteristics. As a result to apply scaling theory, we know the threshold voltage and drain induced barrier lowering is changed, and the deviation rate is changed for device parameters for DGMOSFET.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.2
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• pp.303-307
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• 2006

In this paper, we have designed the p-type metal-oxide semiconductor field-effect transistor(pMOSFET) for SiGe devices with gate lengths of $0.9{\mu}m$ and $0.1{\mu}m$using the TCAD simulators. The electrical characteristics of devices have been investigated over the temperatures of 300 and 77K. We have used the two carrier transfer models(hydrodynamic model and drift-diffusion model). We how that the drain current is higher in the hydrodynamic model than the drift-diffusion model. When the gate length is $0.9{\mu}m$, the threshold voltage shows -0.97V and -1.15V for 300K and 77K, respectively. The threshold voltage is, however, nearly same at $0.1{\mu}m$ for 300K and 77K.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1991.10a
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• pp.205-209
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• 1991

The conventional modeling equations for planar MOSFET can not be directly used for zero or minus junction depth concave MOSFET. In this paper, we suggest a new model which can simulate the electrical characteristics of concave MOSFET. The threshold voltage modeling was achieved using the charge sharing method considering the relative difference of source and drain depletion widths. To analyze the ID-VDS characteristics, the conventional expressions for planar MOSFET were employed with the electrical channel length as an effective channel length and the channel length modulation factor as ${\alpha}$ΔL. By comparing the proposed model with experimental results, we could get reasonably similar curves and we proposed a concave MOSFET conditiion which shows no short channel effect of threshold voltage(V${\gamma}$).