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Current-Mode Circuit Design using Sub-threshold MOSFET  

Cho, Seung-Il (Yamagata Univ. 이공학연구과)
Yeo, Sung-Dae (서울과학기술대학교 NID융합기술대학원 ITSC 연구실)
Lee, Kyung-Ryang (서울과학기술대학교 NID융합기술대학원 ITSC 연구실)
Kim, Seong-Kweon (서울과학기술대학교 전자IT미디어공학과)
Publication Information
Journal of Satellite, Information and Communications / v.8, no.3, 2013 , pp. 10-14 More about this Journal
Abstract
In this paper, when applying current-mode circuit design technique showing constant power dissipation none the less operation frequency, to the low power design of dynamic voltage frequency scaling, we introduce the low power current-mode circuit design technique applying MOSFET in sub-threshold region, in order to solve the problem that has large power dissipation especially on the condition of low operating frequency. BSIM 3, was used as a MOSFET model in circuit simulation. From the simulation result, the power dissipation of the current memory circuit with sub-threshold MOSFET showed $18.98{\mu}W$, which means the consumption reduction effect of 98%, compared with $900{\mu}W$ in that with strong inversion. It is confirmed that the proposed circuit design technique will be available in DVFS using a current-mode circuit design.
Keywords
Sub-threshold; Low Power; Current Mode; Current Memory; Signal Processing;
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