Current-Mode Circuit Design using Sub-threshold MOSFET |
Cho, Seung-Il
(Yamagata Univ. 이공학연구과)
Yeo, Sung-Dae (서울과학기술대학교 NID융합기술대학원 ITSC 연구실) Lee, Kyung-Ryang (서울과학기술대학교 NID융합기술대학원 ITSC 연구실) Kim, Seong-Kweon (서울과학기술대학교 전자IT미디어공학과) |
1 | Seo Y, Kim J, Seo E, "Effectiveness Analysis of DVFS and DPM in Mobile Device", JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, Vol.27, No. 4, pp. 781-790, July 2012 DOI |
2 | Naveen Kumar Kancharapu, Marshnil Dave, Veerraju Masimukkula, Maryam Shojaei Baghini, Dinesh Kumar Sharma, "A Low-Power Low-Skew Current-Mode Clock Distribution Network in 90nm CMOS Technology", IEEE Computer Society Annual Symposium on VLSI, Vol.89, No.5, pp. 132-137, 2011 |
3 | 이성태, 김정범, "Sub-Threshold 회로를 이용한 초 저 전력 32-비트 파이프라인 MAC(multiplication-and -accumulation) 회로 설계, 한국정보기술학회논문지, 제9권, 제7호, pp. 17-23, July, 2011 |
4 | Alice Wang, Benton H, Calhoun, and Anantha P. Chandrakasan. "SUB-THRESHOLD DESIGN FOR ULTRA LOW-POWER SYSTEMS", Springer, 2006 |
5 | 전영득, 조민형, 이희동, 권종기, 김종대, "저전력 아날로그 회 로기술", 전자통신동향분석 제23권, 제6호, pp.81-91, Dec, 2008 |
6 | L. P. Alarcon, T.-T. Liu, M. D. Pierson, J. M. Rabaey, "Exploring Very Low-Energy Logic: A Case Study", Journal of Low Power Electronics, Vol. 3, No. 3, pp. 223-233, 2007 DOI ScienceOn |
7 | Behzad Razavi, "Design of Analog CMOS Integrated Circuit", McGraW-HILL INTERNATIONAL EDITION, 2001 |
8 | Ganesh Kumar Balachandran, Phillip E. Allen, "Switched- Current Circuits in Digital CMOS Technology With Low Charge-Injection Errors", IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 37, No. 10, pp. 1271-1281, 2002 DOI ScienceOn |
9 | G. Giustolisi, G. Palumbo, M. Criscione, F. Cutri, "A Low-Voltage Low-Power Voltage Reference Based on Subthreshold MOSFETs", IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 38, No. 1, pp. 151-154, January 2003. DOI ScienceOn |
10 | ERIC VITTOZ, JEAN FELLRATH, "CMOS Analog Integrated Circuits Based on Weak Inversion Operation", IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-12, No. 3, pp. 224-231, JUNE 1977 |