• 제목/요약/키워드: three-level inverter

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A Study on a Carrier Based PWM having Constant Common Mode Voltage and Minimized Switching Frequency in Three-level Inverter

  • Ahn, Kang-Soon;Choi, Nam-Sup;Lee, Eun-Chul;Kim, Hee-Jun
    • Journal of Electrical Engineering and Technology
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    • v.11 no.2
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    • pp.393-404
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    • 2016
  • In this paper, a carrier-based pulse with modulation (PWM) strategy for three-phase three-level inverter is dealt with, which can keep the common mode voltage constant with minimized switching frequency. The voltage gain and the switching frequency in overall operating ranges including overmodulation are investigated and the analytic equations are presented. Finally, the leakage current reduction effect is confirmed by carrying out simulation and experiment. It will be pointed out that the leakage current cannot be perfectly eliminated because of the dead time.

Overmodulation Characteristics of Carrier Based MVPWM for Eliminating the Leakage Currents in Three-Level Inverter (3-레벨 인버터의 누설전류 제거를 위한 캐리어 기반 MVPWM의 과변조 특성)

  • Lee, Eun-Chul;Choi, Nam-Sup;Ahn, Kang-Soon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.6
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    • pp.509-516
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    • 2015
  • The overmodulation characteristics of a carrier-based medium vector pulse width modulation (CBMVPWM) are examined in this study. CBMVPWM can completely eliminate leakage currents in a three-phase, three-level inverter using only the switching states with the same common mode voltage even in an overmodulation operation. The analytic equations for the magnitude of the output voltage and the switching frequency are derived for overmodulation operation, and the effect of dead time on the leakage current is demonstrated. This study presents the operating principle of CBMVPWM, basic overmodulation features, and simulations and experiments for operating verification.

A Generalized Loss Analysis Algorithm of Power Semiconductor Devices in Multilevel NPC Inverters

  • Alemi, Payam;Lee, Dong-Choon
    • Journal of Electrical Engineering and Technology
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    • v.9 no.6
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    • pp.2168-2180
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    • 2014
  • In this paper, a generalized power loss algorithm for multilevel neutral-point clamped (NPC) PWM inverters is presented, which is applicable to any level number of multilevel inverters. In the case of three-level inverters, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm. The validity of the proposed algorithm is verified by simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter.

A Dual Buck Three-Level PV Grid-Connected Inverter

  • Ji, Baojian;Hong, Feng;Wang, Jianhua;Huang, Shengming
    • Journal of Power Electronics
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    • v.15 no.4
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    • pp.910-919
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    • 2015
  • The use of a PV grid-connected inverter with non-isolated topology and without a transformer is good for improving conversion efficiency; however, this inverter has become increasingly complicated for eliminating leakage current. To simplify the complicated architecture of traditional three-level dual buck inverters, a new dual Buck three-level PV grid-connected inverter topology is proposed. In the proposed topology, the voltage on the grounding stray capacitor is clamped by large input capacitors and is equal to half of the bus voltage; thus, leakage current can be eliminated. Unlike in the traditional topology, the current in the proposed topology passes through few elements and does not flow through the body diodes of MOSFET switches, resulting in increased efficiency. Additionally, a multi-loop control method that includes voltage-balancing control is proposed and analyzed. Both simulation and experimental results are demonstrated to verify the proposed structure and control method.

3-Phase Pseudo-Random Carrier Modulation Technique for the Acoustic Noise Reduction of the 3-Phase Multi-Level Inverter Based Motor (3상 멀티 레벨 인버터 구동 유도 전동기의 소음저감을 위한 3상 준 랜덤 캐리어 변조기법)

  • Park, J.K.;Kim, J.N.;Jung, Y.G.;Lim, Y.C.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.742-745
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    • 2005
  • This paper describes a simple pseudo-random carrier modulation technique for the acoustic noise reduction of the three phase multi-level inverter based motor drives. The proposed method generates a new pseudo-random carrier by randomly synthesizing a carrier with fixed frequency and a carrier with opposition phase. To confirm the validity of the proposed method, a 130v three-phase multi-level inverter was Implemented and tested. The experimental results show that the output line voltage and acoustic noise harmonics spectra of an inverter have broadening effect of harmonics, as only simple synthesis of fixed frequency carries.

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Wavelet PWM Technique for Single-Phase Three-Level Inverters

  • Zheng, Chun-Fang;Zhang, Bo;Qiu, Dong-Yuan;Zhang, Xiao-Hui;Xiao, Le-Ming
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1517-1523
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    • 2015
  • The wavelet PWM (WPWM) technique has been applied in two-level inverters successfully, but directly applying the WPWM technique to three-level inverters is impossible. This paper proposes a WPWM technique suitable for a single-phase three-level inverter. The work analyzes the control strategy with the WPWM and obtains the design of its parameters. Compared with the SPWM technique for a single-phase three-level inverter under the same conditions, the WPWM can obtain high magnitudes of the output fundamental frequency component, low total harmonic distortion, and simpler digital implementation. The feasibility experiment is given to verify of the proposed WPWM technique.

A Simplified SVPWM for Three Level Inverters to Eliminate Leakage Currents in Transformeless Photovoltaic Systems (무변압기형 태양광 시스템에서 누설전류를 제거하기 위한 3레벨 인버터의 단순 SVPWM)

  • Ansari, Arsalan;Kim, Hee-Jun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.2
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    • pp.319-328
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    • 2016
  • This paper proposes a simplified SVPWM for three level inverters in transformerless photovoltaic (PV) systems. With the proposed SVPWM the three level space vector (SV) diagram is divided into only six sectors as in conventional two level SV diagram in such a way that only seven SVs are used among all the available SVs of three level inverter. The main features of the proposed SVPWM are that it is simple to implement, less switching losses as compared to conventional SVPWM and most importantly it eliminates the leakage currents in transformerless PV systems. Detailed theoretical analysis of the proposed SVPWM are presented and verified by numerical simulations and experimental results.

Modified Unipolar Carrier-Based PWM Strategy for Three-Level Neutral-Point-Clamped Voltage Source Inverters

  • Srirattanawichaikul, Watcharin;Premrudeepreechacharn, Suttichai;Kumsuwan, Yuttana
    • Journal of Electrical Engineering and Technology
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    • v.9 no.2
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    • pp.489-500
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    • 2014
  • This paper presents a simple modified unipolar carrier-based pulsewidth modulation (CB-PWM) strategy for the three-level neutral-point-clamped (NPC) voltage source inverter (VSI). Analytical expressions for the relationship between modulation reference signals and output voltages are derived. The proposed modulation technique for the three-level NPC VSI includes the maximum and minimum of the three-phase sinusoidal reference voltages with zero-sequence voltage injection concept. The proposed modified CB-PWM strategy incorporates a novel method that requires only of one triangular carrier wave for generate the gating pulses in three-level NPC VSI. It has the advantages of being simplifying the algorithm with no need of complex two/multi-carrier pulsewidth modulation or space vector modulation (SVM) and it's also simple to implement. The possibility of the proposed CB-PWM technique has been verified though computer simulation and experimental results.

A Multilevel Inverter Using DC Link Voltage Combination (DC링크 전압 조합을 이용한 멀티 레벨 인버터)

  • Joo S.Y.;Lee J.H.;Kang F.S.;Kim C.U.;Park S.J.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.621-624
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    • 2003
  • In this paper, a novel multilevel inverter using DC-Link voltage combination is presented to reduce the harmonics of output voltage without the output filter inductor. The proposed multilevel inverter can generate 27-level output voltage. It employs three H-bridge cells which consist of single phase full-bridge inverter module. As well as, it can make continuous output voltage level employing the properly three DC-Link voltage ratio. The validity of the proposed inverter is verified through the experimental result using a prototype which can generate a 110[Vac], 60[Hz] output voltage from 12[Vdc], 36[vdc], and 108[Vdc] input voltages

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Three-level Inverter Direct Torque Control of Induction Motor Based on Virtual Vectors

  • Tan Zhuohui;Li Yongdong;Hu Hu;Li Min;Chen Jie
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.369-373
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    • 2001
  • Multilevel inverter has attracted great interest in high-voltage high-power field because of its less distorted output. In this paper, a direct torque control (DTC) technique based on a three-level neutral-point-clamped (NPC) inverter is presented. In order to solve the intrinsic neutral-point voltage-balancing problem and to obtain a high performance DTC, a special vector selection method is introduced and the concept of virtual vector is developed. By using the proposed PWM strategy, a MRAS speed sensor-less DTC drive can be achieved without sensing the neutral-point voltage, The strategy can be verified by simulation and experimental results.

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