• ETRI Journal
• /
• v.35 no.4
• /
• pp.610-616
• /
• 2013

This paper proposes a transparent logic circuit for radio frequency identification (RFID) tags in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) technology. The RFID logic circuit generates 16-bit code programmed in read-only memory. All circuits are implemented in a pseudo-CMOS logic style using transparent a-IGZO TFTs. The transmittance degradation due to the transparent RFID logic chip is 2.5% to 8% in a 300-nm to 800-nm wavelength. The RFID logic chip generates Manchester-encoded 16-bit data with a 3.2-kHz clock frequency and consumes 170 ${\mu}W$ at $V_{DD}=6$ V. It employs 222 transistors and occupies a chip area of 5.85 $mm^2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.137-137
• /
• 2009

Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.420-420
• /
• 2014

최근, 과학 기술이 발달함에 따라 현장에서의 실시간 검사 및 자가 지단 등 질병 치유에 대한 사람들의 관심이 증가하고 있으며, 이에 따라 의료, 환경, 산업과 같은 많은 분야에서 바이오 센서에 대한 연구가 활발하게 이루어지고 있다. 그 중, EGFET는 전해질 속의 각종 이온 농도를 전기적으로 측정하는 바이오 센서로, 외부 환경으로부터 안전하고, 제작이 쉬우며, 재활용이 가능하여 비용을 절감 할 수 있다는 장점을 가지고 있다 [1]. EGFET는 감지부와 FET부로 분리된 구조를 가지고 있으며, 감지부의 감지막으로는 Al2O3, HfO2, $TiO_2$, SnO2 와 같은 다양한 물질들이 사용되고 있다. 그 중, SnO2는 우수한 감도와 안정성을 가지고 있는 물질로 추가적인 열처리 공정 없이도 우수한 감지 특성을 나타내기 때문에 본 연구에서 감지막으로 사용하였다. 한편, EGFETs 의 FET부로는 기존의 비정질 실리콘 TFTs 에 비해 10배 이상의 높은 이동도와 온/오프 전류비를 갖는 InGaZnO 를 채널층으로 사용한 TFTs 를 사용하였다. a-IGZO 는 넓은 밴드 갭으로 인해 가시광 영역에서 투명하며, 향후 투명 바이오센서 제작 시, 물질들 사이의 반응을 전기적 신호뿐만 아니라 광학적인 분석 방법으로도 검출이 가능하기에 고 신뢰성을 갖는 센서의 제작이 가능할 것으로 기대된다. 한편, a-IGZO TFTs 의 경우 우수한 전기적 특성을 나타냄에도 불구하고 소자 동작 시 문턱 전압이 불안정하다는 단점이 있으며 [2], 이러한 문제의 개선과 향후 투명 기판 위에서의 소자 제작을 위해서는 저온 열처리 공정이 필수적이다. 따라서, 본 연구에서는 저온 열처리 공정인 u-wave 열처리를 통하여 a-IGZO TFTs 의 전기적 특성 및 안정성을 향상시켰으며, 9.51 [$cm2/V{\cdot}s$]의 이동도와 135 [mV/dec] 의 SS값, 0.99 [V]의 문턱 전압, 1.18E+08의 온/오프 전류 비를 갖는 고성능 스위칭 TFTs 를 제작하였다. 최종적으로, 제작된 a-IGZO TFTs 를 SnO2 감지막을 갖는 EGFETs 에 적용함으로써 우수한 감지 특성과 안정성을 갖는 바이오 센서를 제작하였다.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2015.08a
• /
• pp.163-163
• /
• 2015

The effect of nematic liquid crystal(5CB-4-Cyano-4'-pentylbiphenyl) on the amorphous indium gallium zinc oxide thin film transistors(a-IGZO TFTs) was investigated. Through dropping the 5CB on the a-IGZO TFT's channel layer which is deposited by RF-magnetron sputtering, properties of a-IGZO TFTs was dramatically improved. When drain bias was induced, 5CB molecules were oriented by Freedericksz transition generating positive charges to one side of dipoles. From increment of the capacitance by orientation of liquid crystals, the drain current was increased, and we analyzed these phenomena mathematically by using MOSFET model. Transfer characteristic showed improvement such as decreasing of subthreshold slope(SS) value 0.4 to 0.2 and 0.45 to 0.25 at linear region and saturation region, respectively. Furthermore, in positive bias system(PBS), prevention effect for electron trapping by 5CB liquid crystal dipoles was observed, which showing decrease of threshold voltage shift [(${\delta}V$]_TH) when induced +20V for 1~1000sec at the gate electrode.

• Transactions on Electrical and Electronic Materials
• /
• v.15 no.6
• /
• pp.315-319
• /
• 2014

In this paper, we investigate visible light stress instability in radio frequency (RF) sputtered a-IGZO thin film transistors (TFTs). The oxygen flow rate differs during deposition to control the concentration of oxygen vacancies, which is confirmed via RT PL. A negative shift is observed in the threshold voltage ($V_{TH}$) under illumination with/without the gate bias, and the amount of shift in $V_{TH}$ is proportional to the concentration of oxygen vacancies. This can be explained to be consistent with the ionization oxygen vacancy model where the instability in $V_{TH}$ under illumination is caused by the increase in the channel conductivity by electrons that are photo-generated from oxygen vacancies, and it is maintained after the illumination is removed due to the negative-U center properties.

• Journal of Information Display
• /
• v.12 no.4
• /
• pp.209-212
• /
• 2011

The threshold voltage shift (${\Delta}V_{th}$) under positive-voltage bias stress (PBS) of InGaZnO (IGZO) thin-film transistors (TFTs) annealed at different temperatures in air was investigated. The dramatic degradation of the electrical performance was observed at the sample that was annealed at $700^{\circ}C$. The degradation of the saturation mobility (${\mu}_{sat}$) resulted from the diffusion of indium atoms into the interface of the IGZO/gate insulator after crystallization, and the degradation of the subthreshold slope (S-factor) was due to the increase in the interfacial and bulk trap density. In spite of the degradation of the electrical performance of the sample that was annealed at $700^{\circ}C$, it showed a smaller ${\Delta}V_{th}$ under PBS conditions for $10^4$ s than the samples that were annealed at $500^{\circ}C$, which is attributed to the nanocrystal-embedded structure. The sample that was annealed at $600^{\circ}C$ showed the best performance and the smallest ${\Delta}V_{th}$ among the fabricated samples with a ${\mu}_{sat}$ of $9.38cm^2/V$ s, an S-factor of 0.46V/decade, and a ${\Delta}V_{th}$ of 0.009V, which is due to the passivation of the defects by high thermal annealing without structural change.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.5-5
• /
• 2009

Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.5
• /
• pp.519-525
• /
• 2015

Positive bias stress-induced instability in amorphous indium-gallium-zinc-oxide (a-IGZO) bottom-gate thin-film transistors (TFTs) was investigated under high $V_{GS}$/low $V_{DS}$ and low $V_{GS}$/high $V_{DS}$ stress conditions through incorporating a forward/reverse $V_{GS}$ sweep and a low/high $V_{DS}$ read-out conditions. Our results showed that the electron trapping into the gate insulator dominantly occurs when high $V_{GS}$/low $V_{DS}$ stress is applied. On the other hand, when low $V_{GS}$/high $V_{DS}$ stress is applied, it was found that holes are uniformly trapped into the etch stopper and electrons are locally trapped into the gate insulator simultaneously. During a recovery after the high $V_{GS}$/low $V_{DS}$ stress, the trapped electrons were detrapped from the gate insulator. In the case of recovery after the low $V_{GS}$/high $V_{DS}$ stress, it was observed that the electrons in the gate insulator diffuse to a direction toward the source electrode and the holes were detrapped to out of the etch stopper. Also, we found that the potential profile in the a-IGZO bottom-gate TFT becomes complicatedly modulated during the positive $V_{GS}/V_{DS}$ stress and the recovery causing various threshold voltages and subthreshold swings under various read-out conditions, and this modulation needs to be fully considered in the design of oxide TFT-based active matrix organic light emitting diode display backplane.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.04b
• /
• pp.63-64
• /
• 2009

The TFTs have been fabricated with 3 different geometry SID electrodes which have the same channel W/L ratio (W/L = 5) due to constant channel resistance, The 3 samples have different channel widths (350, 150, and $25\;{\mu}m$) and channel lengths (70, 30, and $5\;{\mu}m$) by fixed channel W/L ratio simultaneously on one chip for reliable comparisons. Resultant on-current and field effect mobility are proportional to the channel width, while the subthreshold swing is inversely proportional to the channel width mainly due to the change of contact resistance. These results show that the contact resistance strongly affects the device performances and should be considered in the applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.22 no.9
• /
• pp.747-750
• /
• 2009

The TFTs have been fabricated with 3 different geometry SID electrodes which have the same channel W/L ratio (W/L = 5) due to constant channel resistance, The 3 samples have different channel widths (350, 150, and 25 ${\mu}m$) and channel lengths (70, 30, and 5 ${\mu}m$) by fixed channel W/L ratio simultaneously on one chip for reliable comparisons. Resultant on-current and field effect mobility are proportional to the channel width, while the subthreshold swing is inversely proportional to the channel width mainly due to the change of contact resistance. These results show that the contact resistance strongly affects the device performances and should be considered in the applications.