• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.273.2-273.2
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• 2014

Sputtering process has been widely used in Si-based semiconductor industry and it is also an ideal method to deposit transparent oxide materials for thin-film transistors (TFTs). The oxide films grown at low temperature by conventional RF sputtering process are typically amorphous state with low density including a large number of defects such as dangling bonds and oxygen vacancies. Those play a crucial role in the electron conduction in transparent electrode, while those are the origin of instability of semiconducting channel in oxide TFTs due to electron trapping. Therefore, post treatments such as high temperature annealing process have been commonly progressed to obtain high reliability and good stability. In this work, the scheme of electron-assisted RF sputtering process for high quality transparent oxide films was suggested. Through the additional electron supply into the plasma during sputtering process, the working pressure could be kept below $5{\times}10-4Torr$. Therefore, both the mean free path and the mobility of sputtered atoms were increased and the well ordered and the highly dense microstructure could be obtained compared to those of conventional sputtering condition. In this work, the physical properties of transparent oxide films such as conducting indium tin oxide and semiconducting indium gallium zinc oxide films grown by electron-assisted sputtering process will be discussed in detail. Those films showed the high conductivity and the high mobility without additional post annealing process. In addition, oxide TFT characteristics based on IGZO channel and ITO electrode will be shown.

• 한국전기전자재료학회논문지
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• 제24권8호
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• pp.674-677
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• 2011

The dependency of sputtering power on the electrical performances in amorphous HIZO-TFT (hafnium-indium-zinc-oxide thin film transistors) has been investigated. The HIZO channel layers were prepared by using radio frequency (RF) magnetron sputtering method with different sputtering power at room temperature. TOF-SIMS (time of flight secondary ion mass spectrometry) was performed to confirm doping of hafnium atom in IZO film. The field effect mobility (${\mu}FE$) increased and threshold voltage ($V_{th}$) shifted to negative direction with increasing sputtering power. This result can be attributed to the high energy particles knocking-out oxygen atoms. As a result, oxygen vacancies generated in HIZO channel layer with increasing sputtering power resulted in negative shift in Vth and increase in on-current.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 추계학술대회 논문집
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• pp.506-508
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• 2005

In general, organic TFTs are comprised of four components: gate electrode, gate dielectric, organic active semiconductor layer, and source and drain contacts. The TFT current, in turn, is typically determined by channel length and width, carrier field effect mobility, gate dielectric thickness and permittivity, contact resistance, and biasing conditions. More recently, a number of techniques and processes have been introduced to the fabrication of OTFT circuits and displays that aim specifically at reduced fabrication cost. These include microcontact printing for the patterning of metals and dielectrics, the use of photochemically patterned insulating and conducting films, and inkjet printing for the selective deposition of contacts and interconnect pattern. In the fabrication of organic TFTs, microcontact printing has been used to pattern gate electrodes, gate dielectrics, and source and drain contacts with sufficient yield to allow the fabrication of transistors. We were fabricated a pentacene OTFTs on flexible PEN film. Au/Cr was used for the gate electrode, parylene-c was deposited as the gate dielectric, and Au/Cr was chosen for the source and drain contacts; were all deposited by ion-beam sputtering and patterned by microcontact printing and lift-off process. Prior to the deposition of the organic active layer, the gate dielectric surface was treated with octadecyltrichlorosilane(OTS) from the vapor phase. To complete the device, pentacene was deposited by thermal evaporation and patterned using a parylene-c layer. The device was shown that the carrier field effect mobility, the threshold voltage, the subthreshold slope, and the on/off current ratio were improved.

• 전자공학회논문지
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• 제52권7호
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• pp.33-39
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• 2015

본 연구에서는 SU-8을 절연층으로 사용해 솔루션 공정을 바탕으로 하여 Indium Zinc Oxide(IZO) thin film transistor(TFT)의 안정성을 향상에 대해 연구하였다. 매우 점성이 강하며 negative lithography 용으로 사용되는 SU-8은 기계적, 화학적으로 높은 안정도를 가진다. 그리고 이 SU-8을 사용해 TFT층의 위에 스핀코팅을 사용해 절연막 층을 쌓고 photo lithography를 이용해 patterning을 하였다. SU-8층에 의한 positive bias stress(PBS)에 대한 전기적 특성 향상의 이유를 연구하기 위해 TFT에 X-ray photoelectron spectroscopy(XPS), Fourier transform infrared spectroscopy(FTIR) 분석을 시행하였다. SU-8을 절연층으로 한 TFT는 좋은 전기적 특성을 보였으며, 전류점멸비, 전자이동도, 문턱전압, subthreshold swing이 각각 $10^6$, $6.43cm^2/V{\cdot}s$, 7.1V, 0.88V/dec로 측정되었다. 그리고 3600초 동안 PBS를 가할 시 ${\Delta}V_{th}$는 3.6V로 측정되었다. 그러나 SU-8 층이 없는 경우 ${\Delta}V_{th}$는 7.7V 였다. XPS와 FTIR을 분석한 결과, SU-8 절연층이 TFT의 산소의 흡/탈착을 차단하는 특성에 의해 PBS에 강한 특성을 나타나게 함을 확인하였다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2011년도 춘계학술발표대회
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• pp.1.1-1.1
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• 2011

Printed electronics based on the direct writing of solution processable functional materials have been of paramount interest and importance. In this talk, the synthesis of printable inorganic functional materials (conductors and semiconductors) for thin-film transistors (TFTs) and photovoltaic devices, device fabrication based on a printing technique, and specific characteristics of devices are presented. For printable conductor materials, Ag ink is designed to achieve the long-term dispersion stability and good adhesion property on a glass substrate, and Cu ink is sophisticatedly formulated to endow the oxidation stability in air and even aqueous solvent system. The both inks were successfully printed onto either polymer or glass substrate, exhibiting the superior conductivity comparable to that of bulk one. In addition, the organic thin-film transistor based on the printed metal source/drain electrode exhibits the electrical performance comparable to that of a transistor based on a vacuum deposited Au electrode. For printable amorphous oxide semiconductors (AOSs), I introduce the noble ways to resolve the critical problems, a high processing temperature above $400^{\circ}C$ and low mobility of AOSs annealed at a low temperature below $400^{\circ}C$. The dependency of TFT performances on the chemical structure of AOSs is compared and contrasted to clarify which factor should be considered to realize the low temperature annealed, high performance AOSs. For photovoltaic application, CI(G)S nanoparticle ink for solution processable high performance solar cells is presented. By overcoming the critical drawbacks of conventional solution processed CI(G)S absorber layers, the device quality dense CI(G)S layer is obtained, affording 7.3% efficiency CI(G)S photovoltaic device.

• 융합정보논문지
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• 제9권3호
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• pp.75-81
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• 2019

본 논문은 유기물로 이루어진 폴리머 기판상에 저온 다결정 실리콘 박막트랜지스터 제조방법에 대해 연구하였다. 먼저, 폴리머 기판에 화학증착방식으로 비결정 실리콘 박막을 증착하였고, 열처리 장치인 퍼니스로 탈수소 및 활성화 공정을 430도에서 2시간동안 진행하였다. 이후 엑시머 레이저를 이용하여 결정화를 진행하여 다결정 실리콘 반도체 막을 제조하였다. 이 박막은 박막트랜지스터 제작을 위한 활성층으로 사용하였다. 제작된 p형 박막트랜지스터는 이동도 $77cm^2/V{\cdot}s$, on/off 전류비는 $10^7$이상의 동작특성을 보였고, 이는 결정화된 박막내부에 결함 농도가 낮음을 의미한다. 이 결과로 유기물 기판상에 엑시머 레이저로 형성된 다결정 실리콘으로 제작된 전자소자는 플렉서블 AMOLED 디스플레이 회로 형성에 최적의 기술임을 알 수 있다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1750-1752
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• 1999

An active-matrix liquid crystal display (LCD) using thin film transistors (TFTs) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the sate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the new set of capacitance models on the pixel operations can be effectively analyzed. The set of models which is adopted from VLSI interconnections calculate more precise capacitance. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.41-41
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• 2009

We utilized atomic layer deposition (ALD) for the growth of the ZnO channel layers in the oxide thin-film-transistors (TFTs) with a bottom-gate structure using a $SiO_2/p-Si$ substrate. For fundamental study, the effect of the channel thickness and thermal treatment on the TFT performance was investigated. The growth modes for the ALD grown ZnO layer changed from island growth to layer-by-layer growth at thicknesses of > 7.5 nm with highly resistive properties. A channel thickness of 17 nm resulted in the good TFT behavior with an onloff current ratio of > $10^6$ and a field effect mobility of 2.9 without the need for thermal annealing. However, further increases in the channel thickness resulted in a deterioration of the TFT performance or no saturation. The ALD grown ZnO layers showed reduced electrical resistivity and carrier density after thermal treatment in oxygen.

• 한국전기전자재료학회논문지
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• 제22권11호
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• pp.992-998
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• 2009

We investigated the influence of organic solvents on the droplet properties of 6,13-bis (triisopropylsilylethynyl) pentacene (TIPS-pentacene), which was used for semiconductor of organic thin film transistors (OTFTs) and deposited by ink jet printing. From the result of the investigation, the conditions of a suitable solvent is that boiling point should be above $200^{\circ}C$ to reduce coffee stain and the surface tension above 32 dyn/cm to decrease the droplet size. Consequently, we selected tetralin which have a high boiling point ($207^{\circ}C$) and high surface tension (34.3 dyn/cm) as the solvent for TIPS-pentacene, and applied it to OTFTs. In fabrication process the conventional bank process employing photolithography and etching process was replaced by ink jet printed bank process, resulting in simplifying the process. Especially, polyvinylphenol was used for the bank, and the high hydrophobicity could improve the confinement of TIPS molecules inside the bank, enhancing the performance over the conventional hydrophilic polyvinylalcohol bank. The mobility was $0.18\;cm^2/Vs$, current on/off ratio $2.09{\times}10^5$, subthreshold slope 0.42 V/dec, and off state current $0.049\;pA/{\mu}m$.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1582-1584
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• 1996

The polycrystalline silicon thin film transistors (poly-Si TFT) are the most promising candidate for active matrix liquid crystal displays (AMLCD) for their high mobilities and current driving capabilities. The leakage current of the poly-Si TFT is much higher than that of the amorphous-Si TFT, thus larger storage capacitance is required which reduces the aperture ratio fur the pixel. The offset gated poly-Si TFTs have been widely investigated in order to reduce the leakage current. The conventional method for fabricating an offset device may require additional mask and photolithography process step, which is inapplicable for self-aligned source/drain ion implantation and rather cost inefficient. Due to mis-alignment, offset devices show asymmetric transfer characteristics as the source and drain are switched. We have proposed and fabricated a new offset poly-Si TFT by applying photoresist reflow process. The new method does not require an additional mask step and self-aligned ion implantation is applied, thus precise offset length can be defined and source/drain symmetric transfer characteristics are achieved.