• 제목/요약/키워드: thin film transistors

검색결과 869건 처리시간 0.028초

RC Oscillator Based on Organic Thin Film Transistor

  • Kim, Seung-Kyum;Kim, Sang-Woo;Moon, Byeong-Cheon;Choi, Woon-Seop;Bae, Byung-Seong
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
    • /
    • pp.1336-1339
    • /
    • 2007
  • Since organic thin film transistor (OTFT) provides simple and low cost processes, its application to the OTFT display has been studied. We developed an RC oscillator using organic thin film transistor and inverters with bootstrapping transistors. Device parameters were optimized by the simulation and OTFT RC oscillators were fabricated. The oscillator frequency and its dependence on resistance and bias voltage were studied. The organic TFT is adequate for low cost and simple process integrated circuits. The frequency of oscillation was simulated and measured. It is acceptable for low-cost microelectronic device and flat panel displays.

  • PDF

Organic Vapor Phase Deposition 방식을 이용한 펜타센 유기박막트랜지스터의 제작 (Fabrication of Pentacene Thin Film Transistors by using Organic Vapor Phase Deposition System)

  • 정보철;송정근
    • 한국전기전자재료학회논문지
    • /
    • 제19권6호
    • /
    • pp.512-518
    • /
    • 2006
  • In this paper, we investigated the deposition of pentacene thin film on a large area substrate by Organic Vapor Phase Deposition(OVPD) and applied it to fabrication of Organic Thin Film Transistor(OTFT). We extracted the optimum deposition conditions such as evaporation temperature of $260^{\circ}C$, carrier gas flow rate of 10 sccm and chamber vacuum pressure of 0.1 torr. We fabricated 72 OTFTs on the 4 inch size Si Wafer, Which produced the average mobility of $0.1{\pm}0.021cm^2/V{\cdot}s$, average subthreshold slope of 1.04 dec/V, average threshold voltage of -6.55 V, and off-state current is $0.973pA/{\mu}m$. The overall performance of pentacene TFTs over 4 ' wafer exhibited the uniformity with the variation less than 20 %. This proves that OVPD is a suitable methode for the deposition of organic thin film over a large area substrate.

다결정 실리콘 박막 트랜지스터의 수소화 효과 (Effects of Hydrogen Passivation on Polycrystalline Silicon Thin Film Transistors)

  • 김용상
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1995년도 하계학술대회 논문집 C
    • /
    • pp.1239-1241
    • /
    • 1995
  • The different hydrogen passivation effects on low-temperature processed and high-temperature processed poly-Si thin film transistors have been investigated. The hydrogen passivation on low-temperature processed poly-Si TFT results in the increase of the field-effect mobility and the decrease or the threshold voltage, while the hydrogenation increases the field-effect mobility and decreases the leakage current in high-temperature processed poly-Si TFT. The effective trap state densities of low-temperature processed poly-Si TFT before and after 5 hours of hydrogenation are estimated at about $4.0{\times}10^{12}/cm^2$ and $1.5{\times}10^{12}/cm^2$, while those of high-temperature processed poly-Si TFT are about $1.5{\times}10^{12}/cm^2$ and $1.2{\times}10^{12}/cm^2$, respectively.

  • PDF

Improvement on the Stability of Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using Amorphous Oxide Multilayer Source/Drain Electrodes

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
    • /
    • 제17권3호
    • /
    • pp.143-145
    • /
    • 2016
  • In order to find suitable source and drain (S/D) electrodes for amorphous InGaZnO thin film transistors (a-IGZO TFTs), the specific contact resistance of interface between the channel layers and various S/D electrodes, such as Ti/Au, a-IZO and multilayer of a-IGZO/Ag/a-IGZO, was investigated using the transmission line model. The a-IGZO TFTs with a-IGZO/Ag/a-IGZO of S/D electrodes had good performance and low contact resistance due to the homo-junction with channel layer. The stability was measured with different electrodes by a positive bias stress test. The result shows the a-IGZO TFTs with a-IGZO/Ag/a-IGZO electrodes were more stable than other devices.

종이위에 구현한 유기박막트랜지스터의 특성 (Polymer Thin Film Transistors Fabricated on Photo Paper)

  • 성재용;김영훈;문대규;한정인;곽성관;정관수
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
    • /
    • pp.489-492
    • /
    • 2004
  • In this paper, we demonstrate polymer thin-film transistors (TFTs) on a paper-based flexible substrate. As a substrate, commercially available photo-paper is used with Parylene coating. The parylene layer enables conventionally used wet chemical process and vacuum deposition processes for electrodes and gate insulator. As an active channel layer, we used poly-3-hexylthiophene (P3HT) which is solution process. Field effect mobility up to $(0.06 {\pm} 0.02) cm^2/Vs$ and on/off ratio of $10^3 {\~}10^4$ are achieved on a photo-paper.

  • PDF

Charge Trapping Mechanism in Amorphous Si-In-Zn-O Thin-Film Transistors During Positive Bias Stress

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
    • /
    • 제17권6호
    • /
    • pp.380-382
    • /
    • 2016
  • The mechanism for instability under PBS (positive bias stress) in amorphous SIZO (Si-In-Zn-O) thin-film transistors was investigated by analyzing the charge trapping mechanism. It was found that the bulk traps in the SIZO channel layer and the channel/dielectric interfacial traps are not created during the PBS duration. This result suggests that charge trapping in gate dielectric, and/or in oxide semiconductor bulk, and/or at the channel/dielectric interface is a more dominant mechanism than the creation of defects in the SIZO-TFTs.

Comparison of Degradation Phenomenon in the Low-Temperature Polysilicon Thin-Film Transistors with Different Lightly Doped Drain Structures

  • Lee, Seok-Woo;Kang, Ho-Chul;Nam, Dae-Hyun;Yang, Joon-Young;Kim, Eu-Gene;Kim, Sang-Hyun;Lim, Kyoung-Moon;Kim, Chang-Dong;Chung, In-Jae
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
    • /
    • pp.1258-1261
    • /
    • 2004
  • Degradation phenomenon in the low-temperature polysilicon (LTPS) thin-film transistors (TFTs) with different junction structures was investigated. A gate-overlapped lightly doped drain (GOLDD) structure showed better hot-carrier stress (HCS) stability than a conventional LDD one. On the other hand, high drain current stress (HDCS) at $V_{gs}$ = $V_{ds}$ conditions caused much severe device degradation in the GOLDD structure because of its higher current level resulting in the higher applied power. It is suggested that self-heating-induced mobility degradation in the GOLDD TFFs be suppressed for using this structure in short-channel devices.

  • PDF

중수소 프라즈마 처리가 다결정 실리콘 TFT의 안정성에 미치는 영향에 관한 연구 (A Study on the Effect of Plasma Deuterium Treatment on Reliability of Poly-Silicon Thin Film Transistors)

  • 손송호;배성찬;김동환
    • 한국재료학회지
    • /
    • 제14권7호
    • /
    • pp.516-521
    • /
    • 2004
  • We applied a deuterium plasma treatment to the surface of polycrystalline silicon films using PECVD and observed the change with AFM, XRD, ET-IR, and SIMS measurement. A bias temperature stressing (BTS) test was carried out to evaluate the reliability of the thin-film transistors (TFT). TFTs with channel lengths as small as 2 ${\mu}m$ were electrically stressed fer up to 1000 sec at room temperature. From the parameter variation such as s-factor, leakage current and on/off ratio, we suggest that the deuterium plasma treatment suppress the hot carrier effect and improve the stability of TFTs.

열처리 공정에 따른 산화물 박막 트랜지스터의 전기적 특성에 관한 연구 (The study on the electrical characteristics of oxide thin film transistors with different annealing processes)

  • 박유진;오민석;한정인
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2011년도 제42회 하계학술대회
    • /
    • pp.25-26
    • /
    • 2011
  • In this paper, we investigated the effect of various annealing processes on the electrical characteristics of oxide thin film transistors (TFTs). When we annealed the TFT devices before and after source/drain (S/D) process, we could observe the different electrical characteristics of oxide TFTs. When we annealed the TFTs after deposition of transparent indium zinc oxide S/D electrodes, the annealing process decreased the contact resistance but increased the resistivity of S/D electrodes. The field effect mobility, subthreshold slope and threshold voltage of the oxide TFTs annealed before and after S/D process were 5.83 and 4.47 $cm^2$/Vs, 1.20 and 0.82 V/dec, and 3.92 and 8.33 V respectively. To analyze the differences, we measured the contact resistances and the carrier concentrations using transfer length method (TLM) and Hall measurement.

  • PDF