• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.5
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• pp.1-8
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• 2009

Since scan based testing is very efficient and widely used for testing large sequential circuits. However, since test patterns are serially injected through long scan chains, scan based testing requires very long test application time. Also, compared to the normal operations, scan shifting operations drastically increase power consumption. In order to solve these problems, this paper presents a new scan architecture for both test application time and test power reduction. The proposed scan architecture partitions scan chains into several segments and bypasses some segments which do not include any specified bit. Since bypassed segments are excluded from the scan shifting operation, the test application time and test power can be significantly reduced.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.5
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• pp.1043-1048
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• 2011

Test vector reordering is a very effective way to reduce power consumption during test application. But, it is time-consuming and complicated processes, and it does not consider internal circuit structure, which may limit the effectiveness. In this paper, we order test vectors using fanout count of primary inputs that consider the internal circuit structure, which may reduce the switching activity. Then, we reorder test test vectors again by using Hamming distance between test vectors. We proposed FOVO algorithm to perform these two ideas. FOVO is an effective way to reduce power consumption during test application. The algorithm is applied to benchmark circuits and we get an average of 3.5% or more reduction of the power consumption.

• ETRI Journal
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• v.38 no.3
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• pp.479-486
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• 2016

System-on-chip (SoC) designs have a number of flip-flops; the more flip-flops an SoC has, the longer the associated scan test application time will be. A scan shift operation accounts for a significant portion of a scan test application time. This paper presents physical-aware approaches for speeding up scan shift operations in SoCs. To improve the speed of a scan shift operation, we propose a layout-aware flip-flop insertion and scan shift operation-aware physical implementation procedure. The proposed combined method of insertion and procedure effectively improves the speed of a scan shift operation. Static timing analyses of state-of-the-art SoC designs show that the proposed approaches help increase the speeds of scan shift operations by up to 4.1 times that reached under a conventional method. The faster scan shift operation speeds help to shorten scan test application times, thus reducing test costs.

• Information Systems Review
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• v.3 no.2
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• pp.277-288
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• 2001

Of critical importance to the success of any e-commerce site are the two factors: rapid application development and quick response time. A three-tier architecture composed of presentation layer, business layer, and data access layer emerges to allow rapid changes in user interface, business logic, and database structures. Too often, such a logical three-tier architecture is considered as requiring a three-tier physical architecture: Web server, application server, and database server running on separate computers. Contrary to the common belief, a Web stress test reveals that the three-tier logical architecture implemented on a two-tier physical platform guarantees a quicker response time due to the reduction in cross-machine communications. This would lead business firms to economize their spending on e-commerce: increasing the number of physical servers to expedite transaction is not necessarily the best solution. Before selecting a particular hardware configuration, a Web stress test needs to be conducted to compare the relative merits of alternative physical architectures. Together with capacity planning, Web stress test emerges as a powerful tool to build robust, yet economical e-commerce sites.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.367-370
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• 2000

It is shown that $I_{DDQ}$ testing is very useful for shipping fault-free CMOS ICs. However, test time of $I_{DDQ}$ testing is extremely larger than one of logic testing. In this paper, a new test input sequence generation methodology is proposed to reduce the test time of $I_{DDQ}$ testing. At first, it is Shown that $I_{DDQ}$ test time Will be denominated by charge supply current for load capacitance of gates whose output logic values are changed by test input vector application and the charge current depends on input sequence of test vectors. After that, a test input sequence generation methodology is proposed. The feasibility is checked by some experiments.riments.

• Journal of Biosystems Engineering
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• v.36 no.5
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• pp.342-347
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• 2011

The effect of SNC(silver nano colloid) on the emission reduction of odors such as ammonia ($NH_3$), hydrogen sulfide ($H_2S$), and methane ($CH_4$) from swine excreta was studied. Silver has been used as an universal antibiotic substance and can reduce the emission of some gases by sterilizing action. Therefore, an apparatus which produces SNC was developed and was conducted its performance test. Also, the SNC made by the apparatus was applied to swine excreta sampled from a piggery in oder to find the effect on the reduction of odor emission. An electrolysis apparatus was developed to produce SNC and its capacity was 0.024 ppm/$hr{\cdot}L$. The effects of SNC on the reduction of odor emission from swine excreta were tested for bad smell gases of ammonia ($NH_3$), hydrogen sulfide ($H_2S$) and methane ($CH_4$). For ammonia gas, factorial experiments were conducted to find the effects of concentration and application rate of SNC. The test results for the different concentrations of 20 ppm, 50 ppm, and 100 ppm showed that the more concentration of SNC was increased, the more emission reduction of ammonia gas increased. From the test results about the effect of application rate, the more SNC was applied, the more emission reduction of $NH_3$ increased. In order to reduce the concentration of $NH_3$ below 5 ppm, SNC of 50 ppm is recommended to be applied at an interval of 6 hours, and is mixed with swine excreta in the volumetric ratio of 4:1. For hydrogen sulfide gas, the concentration was decreased as time went by and was reduced rapidly in the first stage of the tests for all applied concentrations of SNC (20 ppm, 50 ppm, and 100 ppm). Especially, when 100 ml of SNC with 100 ppm was applied, emission of hydrogen sulfide gas was reduced rapidly during early 4 hours after the application of SNC. And, concentration of hydrogen sulfide gas was maintained below 20 ppm after 12 hours. For methane gas, t-test showed that there was no significance on the effect of its application for all applied concentrations of SNC. Therefore, it was concluded that the application of SNC on swine excreta had no effect on the emission reduction of $CH_4$.

• Transactions of the Korean Society of Automotive Engineers
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• v.19 no.2
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• pp.98-104
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• 2011

The introduction of a diesel engine into the passenger car and light duty applications in the United States involves significant technical challenges for the automotive makers. This paper describes the SCR System optimization procedure for such a diesel engine application to meet Tier2 Bin5 emission regulation. A urea SCR system, a representative $NO_x$ reduction after-treatment technique, is applied to a 3.0 liter diesel engine. To achieve the maximum $NO_x$ reduction performance, the exhaust system layout was optimized using series of the computational fluid dynamics and the urea distribution uniformity test. Furthermore a comprehensive simulation model for the key factors influencing $NO_x$ reduction performance was developed and embedded in the Simulink/Matlab environment. This model was then applied to the urea SCR system and played a key role to shorten the time needed for SCR control parameter calibration. The potential of a urea SCR system for reducing diesel $NO_x$ emission is shown for FTP75 and US06 emission standard test cycle.

• Smart Structures and Systems
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• v.4 no.5
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• pp.667-684
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• 2008

Numerous devices exist for reducing or eliminating seismic damage to structures. These include passive dampers, semi-active dampers, and active control devices. The performance of structural systems with these devices has often been evaluated using numerical simulations. Experiments on structural systems with these devices, particularly at large-scale, are lacking. This paper describes a real-time hybrid testing facility that has been developed at the Lehigh University NEES Equipment Site. The facility enables real-time large-scale experiments to be performed on structural systems with rate-dependent devices, thereby permitting a more complete evaluation of the seismic performance of the devices and their effectiveness in seismic hazard reduction. The hardware and integrated control architecture for hybrid testing developed at the facility are presented. An application involving the use of passive elastomeric dampers in a three story moment resisting frame subjected to earthquake ground motions is presented. The experiment focused on a test structure consisting of the damper and diagonal bracing, which was coupled to a nonlinear analytical model of the remaining part of the structure (i.e., the moment resisting frame). A tracking indictor is used to track the actuator ability to achieve the command displacement during a test, enabling the quality of the test results to be assessed. An extension of the testbed to the real-time hybrid testing of smart structures with semi-active dampers is described.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.33-38
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• 2012

The wafer positioning robot in the semiconductor industry is required to operate at high speed for the improvement of productivity. The residual vibration caused by the high speed of the wafer positioning robot, however, makes the life of the robot shorter and the cycle time longer. In this study, the input shaping and the path of the system are designed for the reduction of the residual vibration and the improvement of the cycle time. The followings are the process for the reduction and the improvement; 1) System modeling of the wafer positioning robot, 2) Verification of dynamic characteristics of the wafer positioning robot, 3) Input shaping plan using impulse response reiteration, 4) Simulation test using SIMULINK program, 5) Analysis of result.

• Journal of ILASS-Korea
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• v.29 no.2
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• pp.53-59
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• 2024

Cars are one of the main causes of air pollution in large cities, and 34.6% of domestic air pollution emissions come from mobile sources, of which cars account for 69.6%. In particular, the importance of nitrogen oxides (NOx) and particulate matter (PM), which are major pollutants in diesel vehicles, is increasing due to their high contribution to emissions. Therefore, in this study, the problem of natural regeneration caused by low exhaust gas temperature during low speed and low load operation was solved by applying a complex regeneration DPF that is not affected by temperature conditions to large diesel vehicles with higher driving time and engine displacement than small and medium-sized vehicles. And the feasibility of application to large diesel vehicles was reviewed by measuring the emission reduction efficiency. As a result of the reduction efficiency test on the actual vehicle durability product, PM showed a reduction efficiency of 84% to 86%, and the reduction efficiency of gaseous substances showed a high reduction efficiency of over 90%. The actual vehicle applicability test was completed with three driving patterns: village bus vehicle, police car, and road-going construction equipment vehicle, and no device problems occurred until the end of the test. Both load and no-load smoke measurement results showed a smoke reduction efficiency of over 96%.