• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.9
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• pp.85-95
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• 2004

As the design complexity increases, it is a major problem that the size of test pattern is large and power consumption is high in scan, especially system-on-a-chip(SoC), with the automatic test equipment(ATE). Because static compaction of test patterns heads to higher power for testing, it is very hard to reduce the test pattern volume for low power testing. This paper proposes an efficient compression/decompression algorithm based on run-length coding for reducing the amount of test data for low power testing that must be stored on a tester and be transferred to SoC. The experimental results show that the new algorithm is very efficient by reducing the memory space for test patterns and the hardware overhead for the decoder.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.3
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• pp.93-100
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• 2004

Test scheduling of SoC (System-on-a-chip) is very important because it is one of the prime methods to minimize the testing time under limited power consumption of SoC. In this paper, a heuristic algorithm, in which test resources are selected for groups and arranged based on the size of product of power dissipation and test time together with total power consumption in core-based SoC is proposed. We select test resource groups which has maximum power consumption but does not exceed the constrained power consumption and make the testing time slot of resources in the test resource group to be aligned at the initial position in test space to minimize the idling test time of test resources. The efficiency of proposed algorithm is confirmed by experiment using ITC02 benchmarks.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.8
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• pp.22-34
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• 1999

In this paper, an efficient test algorithm for embedded dual-port memories is presented. The proposed test algorithm can be used to test embedded dual-port memories faster than the conventional multi-port test algorithms and can be used to completely detect stuck-at faults, transition faults and coupling faults which are major target faults in embedded memories. Also, in this work, BIST which performs the proposed memory testing algorithm is designed using Verilog-HDL, and simulation and synthesis for BIST are performed using Cadence Verilog-XL and Synopsys Design-Analyzer. It has been shown that the proposed test algorithm has high efficiency through experiments on various size of embedded memories.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.9
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• pp.44-53
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• 1999

Generating diagnostic test patterns for combinational circuits remain to be a very difficult problem. For example, ISCAS85 c7552 benchmark circuit has 100 million fault pairs, Thus, we need more sophisticated algorithm to get more information. A new diagnostic algorithm for test pattern generation is suggested and implemented in this paper. DIATEST algorithm based on PODEM is also implemented for comparison to the new algorithm. These two algorithms have been applied to ISCAS85 benchmark circuits. Experimental results show that (1) both algorithms achieve fault pair coverage over 99%, (2) total test length of the new algorithm is much shorter than that of DIATEST, and (3) the new algorithm gives much more information used for making diagnostic dictionary, diagnostic decision tree or diagnostic test system despite DIATEST is faster than the new algorithm.

• 유체기계공업학회:학술대회논문집
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• 1999.12a
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• pp.324-332
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• 1999

This paper presents the artificial life algorithm which is remarkable in the area of engineering for optimum design. As artificial life organisms have a sensing system, they can find the resource which they want to find and metabolize it. And the characteristics of artificial life are emergence and dynamical interacting with environment. In other words, the micro interaction with each other in the artificial life's group results in emergent colonization in the whole system. In this paper, therefore, artificial life algorithm by using above characteristics is employed into functions optimization. The effectiveness of this proposed algorithm is verified through the numerical test of single and multi objective functions. The numerical tests also show that the proposed algorithm is superior to genetic algorithm and immune algorithm for the Multi-peak function. And artificial life algorithm is also applied to optimum design of high-speed, short journal bearings and verified through the numerical test.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.62 no.1
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• pp.36-44
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• 2013

This paper is written for the development and application of boiler fuel control algorithm and distributed control system of coal-fired power plant by the steps of design, coding, simulation test, site installation and site commissioning test. Fuel control algorithm has the upper algorithm and it is boiler master control algorithm that controls the fuel, feed water, air by generation output demand. Generation output demand by power load influences fuel control. Because fuel can not be supplied fast to the furnace of boiler, fuel control algorithm was designed adequately to control the steam temperature and to prevent the explosion of boiler. This control algorithms were coded to the control programs of distributed control systems which were developed domestically for the first time. Simulator for coal-fired power plant was used in the test step. After all of distributed control systems were connected to the simulator, the tests of the actual power plant were performed successfully. The reliability was obtained enough to be installed at the actual power plant and all of distributed control systems had been installed at power plant and all signals were connected mutually. Tests for reliability and safety of plant operation were completed successfully and power plant is being operated commercially. It is expected that the project result will contribute to the safe operation of domestic new and retrofit power plants, the self-reliance of coal-fired power plant control technique and overseas business for power plant.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.71-78
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• 2006

An NoC (Networks-on-Chip) is an emerging design paradigm intended to cope with a future SoC containing numerous built-in cores. In an NoC, the test strategy is very significant for its practicality and feasibility. Among existing test issues, TAM architecture and test scheduling will particularly dominate the overall test performance. In this paper, we address an efficient NoC test scheduling algorithm based on a rectangle packing approach used for an SoC test. In order to adopt the rectangle packing solution as an NoC test scheduling algorithm we design the configuration about test resources and test methods suitable for an NoC structure. Experimental results using some ITC'02 benchmark circuits show the proposed algorithm can reduce the overall test time by up to $55\%$ in comparison with previous works.

• Transactions of the Korean Society of Automotive Engineers
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• v.17 no.2
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• pp.49-56
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• 2009

In this study, a side collision accident reconstruction using database based on the deformed shape information from the collision test using model cars is suggested. A deformation index and angle index related to the deformed shape is developed to set the database for the collision accident reconstruction algorithm. Two small size RC cars are developed to carry out the side collision test. Several side collision tests according to the velocity and collision angles are performed for establishing the side collision database. A high speed camera with 1000fps is used to capture the motion of the car. A side collision accident reconstruction algorithm is developed and applied to find the collision conditions before the accident occurs. Two collision cases are tested to validate the database and the algorithm. The results obtained by the reconstruction algorithm show good match with original conditions with regard to the velocity and angle.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.9
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• pp.469-478
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• 2001

It is difficult to test a distributed system because of the task of controlling concurrent events,. Existing works do not propose the test sequence generation algorithm in a formal way and the amount of message is large due to synchronization. In this paper, we propose a formal test sequence generation algorithm using logical clock to control concurrent events. It can solve the control-observation problem and makes the test results reproducible. It also provides a generic solution such that the algorithm can be used for any possible communication paradigm. In distributed test, the number of channels among the testers increases non-linearly with the number of distributed objects. We propose a new remote test architecture for solving this problem. SDL Tool is used to verify the correctness of the proposed algorithm and it is applied to the message exchange for the establishment of Q.2971 point-to-multipoint call/connection as a case study.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.6
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• pp.1058-1062
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• 2008

In clinical decision support system(CDSS), unlike rule-based expert method, appropriate data-driven machine learning method can easily provide the information of individual feature(clinical test) for disease classification. However, currently developed methods focus on the improvement of the classification accuracy for diagnosis. With the analysis of feature importance in classification, one may infer the novel clinical test sets which highly differentiate the specific diseases or disease states. In this background, we introduce a novel CDSS that integrate a classifier and feature selection module together. Random forest algorithm is applied for the classifier and the feature importance measure. The system selects the significant clinical tests discriminating the diseases by examining the classification error during backward elimination of the features. The superior performance of random forest algorithm in clinical classification was assessed against artificial neural network and decision tree algorithm by using breast cancer, diabetes and heart disease data in UCI Machine Learning Repository. The test with the same data sets shows that the proposed system can successfully select the significant clinical test set for each disease.