• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.149-152
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• 2002

The performance of a 1-bit DAC depends on that of the analog circuits. The mixed SC-CT (switched capacitor-continuous time) architecture is an effective design methodology for the analog circuits. This paper Proposes a new buffer scheme for the 1-bit digital-to-analog subconverter and a new SF-DSC(smoothing filter and differential-to-sig le converter) which performs both the smoothing filter and the differential-to-single convertor simultaneously.

• Journal of Power Electronics
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• v.7 no.2
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• pp.124-131
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• 2007

In this paper, a novel type of auxiliary switched capacitor assisted edge resonant soft switching PWM resonant DC-DC converter with two simple auxiliary commutation lossless inductor snubbers is presented. The operation principle of this converter is described using the switching mode equivalent circuits. This newly developed multi resonant DC-DC converter can regulate its DC output AC power under a principle of constant frequency edge-resonant soft switching commutation by an asymmetrical PWM duty cycle control scheme. The high frequency power regulation and actual power characteristics of the proposed soft switching PWM resonant DC-DC converter are evaluated and discussed. The operating performances of the newly proposed soft switching inverter are represented based on simulation results from an applications point of view.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.906-909
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• 2006

This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented in a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage.

• Journal of Power Electronics
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• v.18 no.1
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• pp.11-22
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• 2018

This paper presents a single switch, high step-up, non-isolated dc-dc converter suitable for renewable energy applications. The proposed converter is composed of a coupled inductor, a passive clamp circuit, a switched capacitor and voltage lift circuits. The passive clamp recovers the leakage inductance energy of the coupled inductor and limits the voltage spike on the switch. The configuration of the passive clamp and switched capacitor circuit increases the voltage gain. A wide continuous conduction mode (CCM) operation range, a low turn ratio for the coupled inductor, low voltage stress on the switch, switch turn on under almost zero current switching (ZCS), low voltage stress on the diodes, leakage inductance energy recovery, high efficiency and a high voltage gain without a large duty cycle are the benefits of this converter. The steady state operation of the converter in the continuous conduction mode (CCM) and discontinuous conduction mode (DCM) is discussed and analyzed. A 200W prototype converter with a 28V input and a 380V output voltage is implemented and tested to verify the theoretical analysis.

• Journal of Power Electronics
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• v.6 no.2
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• pp.95-103
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• 2006

In this paper, a novel prototype of auxiliary switched capacitor assisted voltage source soft switching PWM Single-Ended Push Pull (SEPP) series capacitor compensated load resonant inverter with two auxiliary edge resonant lossless inductor snubbers is proposed and discussed for small scale consumer high-frequency induction heating (IH) appliances. The operation principle of this inverter is described by using switching mode equivalent circuits. The newly developed multi resonant high-frequency inverter using trench gate IGBTs can regulate its output AC power via constant frequency edge-resonant associated soft switching commutation by using an asymmetrical PWM control or duty cycle control scheme. The brand-new consumer IH products which use the newly proposed edge-resonant soft switching PWM-SEPP type series load resonant high-frequency inverters are evaluated using power regulation characteristics, actual efficiency vs. duty cycle and input power vs. actual efficiency characteristics. Their operating performance compared with some conventional soft switching high-frequency inverters for IH appliances is discussed on the basis of simulation and experimental results. The practical effectiveness of the newly proposed soft switching PWM SEPP series load resonant inverter is verified from an application point of view as being suitable for consumer high-frequency IH appliances.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.1
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• pp.197-204
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• 2010

This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented m a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage. The 1% settling time of the opamp is measured to be 560 ns with load capacitance of 16 pF. The experimental testing of the sigma-delta modulator with bit-stream inspection and analog spectrum analyzing plot is performed. The die size is $1.9{\times}1.5\;mm$.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.739-742
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• 2002

This article proposes a Four-Quadrant Analog Multiplier (4-QAM) applying switched-capacitor and pulse-width amplitude modulation (PWAM) principles. The features of the presented circuit are that it can function as analog multiplier with a wide dynamic range of input signal and no disturbing from deviation of carrier frequency of PWM signal. In addition, the circuit detail is simpler than that of the previously proposed circuits. It is then easy and applicable for employing it into Integrated Circuit (IC) realization to especially operate in low-frequency and low-power applications. The experimental results granted are in correspondence to the theoretical analysis.

• Journal of Power Electronics
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• v.18 no.3
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• pp.672-680
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• 2018

A bidirectional exponential-gain switched-capacitor (SC) DC-DC converter is developed in this paper. When compared with existing exponential SC converters, the number of switches is significantly reduced and its structure is simplified. The voltage transfer features, voltage ripple across capacitors, efficiency and output impedance of the proposed converter are analyzed in detail. Optimization of the output impedance is also discussed and the best type of capacitance distribution is determined. A common function of the voltage gain to the output impedance is found among the proposed converter and other popular SC voltage multipliers. Experimental evaluation is carried out with a 6-24V bidirectional prototype converter.

• Proceedings of the KIEE Conference
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• 2005.10c
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• pp.169-171
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• 2005

In this paper, a novel type of auxiliary switched capacitor assisted edge resonant soft switching PWM series load resonant high frequency inverter with two auxiliary edge resonant lossless inductor snubbers is proposed for small consumer induction heating appliances. The operation principle of this high frequency inverter is described using the switching mode equivalent circuits. The practical effectiveness of the newly proposed soft switching inverter are discussed as compared with the conventional soft switching high frequency inverters based on simulation and experimental results from an application point of view.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1449-1457
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• 2019

This paper presents two voltage domain stacking topologies for powering integrated digital loads such as multiprocessors or 3D integrated circuits. Pairs of loads and capacitors are connected in series to form a stack of voltage domains. The voltage is balanced by switching the position of the capacitors in one case and the position of the loads in the other case. This method makes the voltage regulation robust to large differential load power consumption. The first configuration can be named the load stacking topology. The second configuration can be named the capacitor stacking topology. This paper aims at proposing and comparing these two topologies. Models of both topologies and a switching scheme are presented. The behavior, control scheme, losses and overall performance are analyzed and compared theoretically in simulation and experiments. Experimental results show that the capacitor stacking topology has better performance with a 30% voltage ripple reduction.