• Title/Summary/Keyword: sustain voltage

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A Study on the New Electrode Structure for the high density Xe realization of AC PDP (AC PDP의 고농도 Xe %실현에 대한 새로운 전극구조에 관한 연구)

  • Kim, G.H.;Lee, D.K.;Lee, Y.K.;Heo, J.E.;Kim, D.H.;Lee, H.J.;Park, C.H.
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1658-1661
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    • 2002
  • Up to now, one of the most serious problems in AC PDP is low luminous efficiency. One possible candidate for solving such problem is using high density Xe. But an increase of the Xe percentage cause rising of the driving voltage and so even if brightness is being increased, luminous efficiency is decreased. In this study, to solve this problem, we proposed new electrode structure. A test panel fabricated using new electrode shows an improvement of efficiency by 25% and a lowering of sustain voltage by 20% compared with the conventioned structure.

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A New Address-While-Display Driving Method using the $\underline{S}hort\;\underline{R}amp\;\underline{R}eset$ Pulse (SRR) for High Contrast ratio and Wide Address Margin

  • Jung, Jae-Chul;Whang, Ki-Woong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.631-634
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    • 2005
  • We propose a new address-while-display (AWD) driving method to obtain a high contrast ratio and a wide driving margin which is composed of a short ramp reset period, a sustain period and an address period as the basic unit. The short ramp reset (SRR) pulse made it possible to assure the wide operating voltage margin and minimize the background luminance by redistributing the wall charges between address and scan electrode. As a result, a high dark room contrast ratio of 10000 to 1 could be obtained with a wide operating voltage margin of 40V for stable address.

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A High Efficiency Single-Stage PFC Flyback Converter for PDP Sustaining Power Module (PDP 유지 전원단을 위한 고효율 Single-stage PFC Flyback Converter)

  • Yoo, Kwang-Min;Lim, Sung-Kyoo;Lee, Jun-Young
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.3 s.16
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    • pp.11-16
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    • 2006
  • A low cost PDP sustain power supply is proposed based on flyback topology. By using Boundary Conduction Method(BCM) to control input current regulation, DCM condition can be met under all load conditions. Another feature of the proposed method is that a excessive voltage stress due to the link voltage increase can be suppressed by removing link capacitor and suggest new 'Level-shifting switch driver'. this new gate driver is improved 66% of efficiency than switching loss of a existed push-pull amplifier. The proposed converter is tested with a 400W(200V-2A output) prototype circuit.

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A study on performance characteristic of Multi-level PDP driver circuit in accordance of signal time (Multi-Level을 사용한 PDP 구동회로에서 Timing 변화에 따른 특성 변화에 관한 연구)

  • Kim, J.S.;Kang, S.E.;Song, S.H.;Roh, J.W.;Hong, S.S.;SaKong, S.C.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.96-98
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    • 2005
  • Proposed Multi-level PDP sustain Driver make use of element which has a low voltage rating instead of suggested method by the existing Webber and it passes through a second phase both rising and falling at sustaining voltage waveform In accordance with the change of timing phase(Tr1, Ti1, Tr2) performance comparison of a electric discharge characteristics in a PDP module has been carried out. At the conclusion of experimentation, the feature is extended by alteration of Ti1 and it has little to do with alteration of Tr1.

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An Isolated Bidirectional Modular Multilevel DC/DC Converter for Power Electronic Transformer Applications

  • Wang, Zhaohui;Zhang, Junming;Sheng, Kuang
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.861-871
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    • 2016
  • With high penetration of renewable energies, power electronic transformers (PETs) will be one of the most important infrastructures in the future power delivery and management system. In this study, an isolated bidirectional modular multilevel DC/DC converter is proposed for PET applications. A modular multilevel structure is adopted as switching valves to sustain medium voltages to achieve modular design and high reliability. Only one high-frequency transformer is used in the proposed converter, which significantly simplifies the circuit and galvanic insulation design. A dual-phase-shift modulation strategy is proposed to regulate the output power and achieve a simple voltage balancing control. A down-scaled (2 kW/20 kHz) prototype is constructed to demonstrate the proposed converter and verify the control strategy. The experimental results comply with the theoretical analysis well, with the highest power efficiency reaching 97.6%.

A Study on High Efficient Energy Recovery Circuit for AC Plasma Display Panel Drive (AC Plasma Display Panel구동 장치의 고효율 전력 회수 회로에 관한 연구)

  • Yoon Won-Sik;Kang Feel-Soon;Park Han-Woog;Kim Cheul-U
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.442-445
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    • 2001
  • The sustaining driver for color ac plasma display panel should provide alternating high voltage pulses and recover the energy discharged from the intrinsic capacitance between the scanning and sustaining electrodes inside the panel. In this paper, a novel efficient energy recovery circuit employing boost-up function is proposed to achieve a faster rise-time and in order to obtain a stable sustain voltage. The principle of operation, features, and simulated results are illustrated and verified on an equivalent capacitance, which is equals In that of 40-inch-panel, 200 (kHz).

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Vt Close Curve Analysis for Improving Address Discharge Characteristics in Open Dielectric Structure of AC PDP (플라즈마 디스플레이의 개방형 유전체 구조에서 기입방전특성을 향상시키기 위한 Vt 폐곡선 분석)

  • Cho, Byung-Gwon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.1
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    • pp.179-184
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    • 2014
  • The discharge characteristics of an open dielectric structure were investigated, especially such as a firing voltage and related wall voltage, compared with conventional panel structure based on the Vt close curve measurement in AC plasma display panel. While the front panel of the conventional structure in AC plasma display panel was composed of the glass, electrodes, and dielectric, the open dielectric structure could easily produce the discharge between the scan and the sustain electrodes by erasing the dielectric layer between two electrodes. As the open dielectric structure differ from the conventional structure, various problems were produced when driving with the conventional driving waveform. Especially, due to the changes in the discharge firing characteristics of the open dielectric structure between the scan and the sustain electrodes on the front panel, the conventional reset waveform including the address waveform needed to be modified. In this study, the Vt close curves were measured to compare the discharge firing voltages on three electrodes in the conventional and open dielectric structure and based on the Vt close curve analysis, the modified driving waveform suitable for the open dielectric structure was proposed.

A Novel Multi-Level Type Energy Recovery Sustaining Driver for AC Plasma Display Panel (새로운 AC PDP용 멀티레벨 에너지 회수회로)

  • Hong, Soon-Chang;Jung, Woo-Chong;Kang, Kyoung-Woo;Yoo, Jong-Gul
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.4
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    • pp.71-78
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    • 2005
  • This paper proposes a novel multi-level energy recovery sustaining driver for AC PDP(Plasma Display Panel), which solves the problems of the conventional multi-level sustaining driver. While the conventional circuit improves the voltage md current stress of the switching elements in Weber circuit not only there are parasitic resonant currents between resonant inductors and parasitic capacitance and hard switching, but also the changing period between 0 and sustain voltage is too long. Comparing the proposed circuit with the conventional circuit, the number of components are reduced and the parasitic resonant currents in resonant inductors are eliminated Moreover the hard switching problem is solved by using CIM(Current Injection Method) and the operating frequency will be high as much as possible by removing Vs/2 sustain period. And the circuit operations of the proposed circuit are analyzed for each mode and the validity is verified by the simulations using PSpice program.

A New High Efficiency DC/DC Converter with Wide ZVS Range for PDP Sustain Power Module (PDP 유지전원단을 위한 넓은 영전압 스위칭 범위를 갖는 새로운 고효율 DC/DC 컨버터)

  • Park Ki-Bum;Kim Chong-Eun;Moon Gun-Woo;Youn Myung-Joong
    • The Transactions of the Korean Institute of Power Electronics
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    • v.10 no.2
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    • pp.177-185
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    • 2005
  • A new high efficiency DC/DC converter is proposed, which is derived from the conventional asymmetric half-bridge converter. Because the proposed converter has better ZVS condition compared with the conventional asymmetric half-bridge converter, it shows a high efficiency along the wide load range. In this paper, the basic operations of the proposed converter is analyzed and compared with that of the conventional half-bridge converter, and the excellent performance of the proposed converter is verified by the experimental results with the 425W, 385-170Vdc prototype of the power supply for PDP (Plasma Display Panel) Sustain Driver of PDP TV.

Measurement of Wall Voltage in Reset Discharge of AC PDP

  • Park, K.D.;Jung, Y.;Ryu, C.G.;Choi, J.H.;Kim, S.B.;Cho, T.S.;Oh, P.Y.;Jeon, S.H.;Choi, E.H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.722-725
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    • 2003
  • In AC plasma display, it is very important to quantify the wall voltage induced by the wall charge accumulated on the dielectric surface. If we know the quantities of the wall voltage in each period of every sequence; reset period, address period and sustain period, then it helps us to design the optimal driving waveform for high efficiency plasma display. We develop a new method to measure the wall voltage with VDS (Versatile Driving Simulator) system. From this method the wall voltage induced by a wall charge profiles just after the reset discharge of every cells in plasma display panel can be investigated and analyzed successfully. It is noted that the wall voltage profiles are influenced by the space charge and then they are stabilized as time goes by. It is also noted that both the remaining wall charge at the previous sequence and space charges contribute to wall voltage quantities just after the reset discharge. It is noted that the wall charges contribute dominantly after a few hundreds microseconds, while the space charges have been decayed within 100 ${\mu}s$ just after the reset discharge.

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