• Journal of the Institute of Electronics Engineers of Korea SC
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• v.41 no.6
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• pp.17-25
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• 2004

In this paper, we propose a new small swing domino logic for low-power consumption. To reduce the power consumption, both the precharge node and the output node swing the range from 0 to $V_{REF}$- $V_{THN}$, where $V_{REF}$=VDD-n $V_{THN}$ (n=1, 2, and 3). This can be done by adding the inverter structure on domino logic that allows a full swing or a small swing on its input terminal without leakage current. Compared to previous works, the proposed structure can save the power consumption of more than 30% for n=0, 1, 2, and 3 in the equation of $V_{REF}$=VDD-n $V_{THN}$. A multiplier applying the proposed domino logic has been designed and fabricated using a 0.35-${\mu}{\textrm}{m}$ n-well CMOS process under 3.3-V supply voltage. Compared with other previous works, it shows a 30% power reduction and a better feature in power-delay product.lay product.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.1-6
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• 2011

This paper describes a phase modulation I/O (PMIO) serial interface circuit that supports 1Gbps transfer rate with 12mW power consumption at 1.2V supply. The proposed PMIO which consists of TX and RX blocks utilizes a phase modulation technique. The rising edge is fixed to get the clock phase information and falling edge has multi positions for the multi-data information to increase the transfer rate. The designed circuit use the 16 possible falling edge positions. The data transfer rate is four times faster than the clock rate. The circuit has been implemented using $0.13{\mu}m$ CMOS process. Measured results show the circuit exhibits peak-to-peak jitters of transfer data (phase data) and recovery data.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.21 no.1
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• pp.16-22
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• 2009

In order to investigate $CO_2$ heat transfer coefficient and pressure drop by PAG oil concentration during $CO_2$ evaporation, the experiment on evaporation heat transfer characteristics in a mini-channels were performed. The experimental apparatus consisted of a test section, a DC power supply, a heater, a chiller, a mass flow meter, a pump and a measurement system. Experiment was conducted for various mass fluxes($300{\sim}800kg/m^{2}s$), heat fluxes($10{\sim}40kW/m^2$) saturation temperatures($-5{\sim}5^{\circ}C$), and PAG oil concentration(0, 3, 5wt%). The variation of the heat transfer coefficient was different according to the oil concentration. With the increase of the oil concentration, the evaporation heat transfer coefficient decreased and the delay of dryout by oil addition was found. Pressure drop increased with the increase of the oil concentration and heat flux, and the decrease of saturation temperature.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.5C
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• pp.395-402
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• 2008

In this paper, an I/Q channel 12bits 40MS/s Pipeline Analog to Digital Converter that is able to apply to WLAN/WMAN system is proposed. The proposed ADC integrates DLL based duty-correction circuit which corrects the fluctuations in the duksty cycle caused by miniaturization of CMOS devices and faster operating speeds. It is designed as a 1% to 99% input clock duty cycle could be corrected to 50% output duty cycle. The prototype ADC is implemented in a $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process and dissipates 184mW at 1.8V single supply The SNDR of the proposed 12bit ADC is 52dB and SFDR of 59dBc(@Fs=20MHz, Fin=1MHz) is measured.

• Proceedings of the Korea Contents Association Conference
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• 2008.05a
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• pp.51-55
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• 2008

Request High-Images, High-quality, duplex transmission, BcN Voice telephone, Broadcast, Data internet service came to be all possible and demolished original communication service area. Also, The quality is guaranteed stablely to new business and ISP the requirement comes to become a multicasting quality guarantee mechanism which there is the reliability for a information communication and High-quality multimedia service. Like this, a multicast mechanism to be guaranteed must become air control End-to-End QoS for a service supply, a transmission delay a packet loss or requirement which the user requests guarantee and multicast Path-NET which there is the reliability must be provided. Therefor, we proposed IP base multicast new join the present the multicast mechanism of Probing packet foundation which there is the efficiently a linking acceptance, we used ns-2 simulator for the performance evaluation of the proposed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.2
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• pp.408-414
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• 2014

This paper proposes a charge-pump phase-locked loop (PLL) with 51-phase output clock of a 125 MHz target frequency. The proposed PLL uses three voltage controlled oscillators (VCOs) to generate 51-phase clock and increase of maximum operating frequency. The 17 delay-cells consists of each VCO, and a resistor averaging scheme which reduces the phase mismatch among 51-phase clock combines three VCOs. The proposed PLL uses a 65 nm 1-poly 9-metal CMOS process with 1.0 V supply. The simulated peak-to-peak 지터 of output clock is 0.82 ps at an operating frequency of 125 MHz. The differential non-linearity (DNL) and integral non-linearity (INL) of the 51-phase output clock are -0.013/+0.012 LSB and -0.033/+0.041 LSB, respectively. The operating frequency range is 15 to 210 MHz. The area and power consumption of the implemented PLL are $580{\times}160{\mu}m^2$ and 3.48 mW, respectively.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.7
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• pp.2496-2512
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• 2021

The requirements for powerful computing capability, high capacity, low latency and low energy consumption of emerging services, pose severe challenges to the fifth-generation (5G) network. As a promising paradigm, mobile edge networks can provide services in proximity to users by deploying computing components and cache at the edge, which can effectively decrease service delay. However, the coexistence of heterogeneous services and the sharing of limited resources lead to the competition between various services for multiple resources. This paper considers two typical heterogeneous services: computing services and content delivery services, in order to properly configure resources, it is crucial to develop an effective offloading and caching strategies. Considering the high energy consumption of 5G base stations, this paper considers the hybrid energy supply model of traditional power grid and green energy. Therefore, it is necessary to design a reasonable association mechanism which can allocate more service load to base stations rich in green energy to improve the utilization of green energy. This paper formed the joint optimization problem of computing offloading, caching and resource allocation for heterogeneous services with the objective of minimizing the on-grid power consumption under the constraints of limited resources and QoS guarantee. Since the joint optimization problem is a mixed integer nonlinear programming problem that is impossible to solve, this paper uses deep reinforcement learning method to learn the optimal strategy through a lot of training. Extensive simulation experiments show that compared with other schemes, the proposed scheme can allocate resources to heterogeneous service according to the green energy distribution which can effectively reduce the traditional energy consumption.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.4
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• pp.562-570
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• 2022

The supply expansion of 5G services and personal smart devices has caused the sharp increase of data traffic and the demand of various services. Again, these facts have resulted in the huge demand of network bandwidth. However, existing network technologies using electronic signal have reached the limit to accommodate the demand. Therefore, in order to accept this request, optical internet has been studied actively. However, optical internet still has a lot of problems to solve, and among these barriers a very urgent issue is to develop QoS technologies. Hence, in order to achieve service differentiation between classes in optical internet, especially in OBS network, a new QoS method automatically tuning the size of data bursts is proposed in this article. Especially, the algorithm suggested in this article is based on fiber delay line.

• Journal of agricultural medicine and community health
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• v.47 no.1
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• pp.1-13
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• 2022

Objectives: This study aimed to establish a linkage model involving regional responsible medical institutions after analyzing the existing conditions and deriving problems through qualitative analysis within the community care system. Methods: A total of 14 participants of this study were selected through the snowball sampling method, including 7 community care service providers and 7 service users. As for the research data, primary data were collected through interviews, and as a result of analyzing according to Aday&Anderson' model, a total of 5 catergories, 8 topics, and 22 sub theme were derived. Results: The problem derived from the interview is that division services are provided for each institution due to the absence of a key central institution of community care system, and users' commercial institutions is unclear. The second is the inconsistency between the needs and supply for community care, resulting in a possibility of delay in returning to the community after discharge. Based on these problems, it is necessary to unify it as an community care window of the Dong-community center. In addition, there is a need for public health centers to play an active role, and to establish a public-private joint system with the Health and Living Support Center to establish a model that can play a certain role. Conclusions: Therefore, based on the results of this study, it can be used as basic data when constructing community care model and applying it as an expanded model in the future.

• Journal of IKEEE
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• v.26 no.4
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• pp.714-721
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• 2022

A phase-locked loop (PLL)-based frequency synthesizer is proposed for a system on a chip (SoC) using multi-frequency clock signals. The proposed PLL-based frequency synthesizer consists of a charge pump PLL which is implemented by a phase frequency detector (PFD), a charge pump (CP), a loop filter, a voltage controlled oscillator (VCO), and a frequency divider, and an edge combiner. The PLL outputs a 12-phase clock by a VCO using six differential delay cells. The edge combiner synthesizes the frequency of the output clock through edge combining and frequency division of the 12-phase output clock of the PLL. The proposed PLL-based frequency synthesizer is designed using a 55-nm CMOS process with a 1.2-V supply voltage. It outputs three clocks with frequencies of 166 MHz, 83 MHz and 124.5MHz for a reference clock with a frequency of 20.75 MHz.