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Low Power Serial Interface I/O by using Phase Modulation  

Park, Hyung-Min (School of Electronics Eng., INHA University)
Kang, Jin-Ku (School of Electronics Eng., INHA University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.48, no.2, 2011 , pp. 1-6 More about this Journal
Abstract
This paper describes a phase modulation I/O (PMIO) serial interface circuit that supports 1Gbps transfer rate with 12mW power consumption at 1.2V supply. The proposed PMIO which consists of TX and RX blocks utilizes a phase modulation technique. The rising edge is fixed to get the clock phase information and falling edge has multi positions for the multi-data information to increase the transfer rate. The designed circuit use the 16 possible falling edge positions. The data transfer rate is four times faster than the clock rate. The circuit has been implemented using $0.13{\mu}m$ CMOS process. Measured results show the circuit exhibits peak-to-peak jitters of transfer data (phase data) and recovery data.
Keywords
Phase modulation (PM); SerDes; Phase locked loop(PLL); Delay locked loop(DLL);
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