• Journal of Electrical Engineering and Technology
• /
• v.9 no.2
• /
• pp.589-599
• /
• 2014

On the basis of the traditional ZSI (Z-source inverter), this paper presents a ESL-${\Gamma}$-ZSI, which uses a unique ${\Gamma}$-shaped impedance network and an extended SL network for boosting its output voltage in addition to their usual voltage-buck behavior. The inverter can increase the boost factor through adjusting shoot-through duty ratio and increasing the number of inductors. Capacitor voltage stress of ESL-${\Gamma}$-ZSI is a constant when 1>D>0, and ESL-${\Gamma}$-ZSI has small inductor current stress. The working principle of ESL-${\Gamma}$-ZSI and comparison with the classical ZSI and SL- ZSI are analyzed in detail. The power loss comparison between ESL-${\Gamma}$-ZSI and Cuk converter is analyzed detailedly. Simulation and experimental results are given to demonstrate the operation features of the inverter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.11
• /
• pp.1167-1173
• /
• 2004

This paper reports the variations of varistor voltage, nonlinear exponent, leakage current, and dissipation factor against surge stress of ZnO-P $r_{6}$ $O_{11}$-CoO-C $r_2$ $O_3$-E $r_2$ $O_3$(ZPCCE)-based varistors manufactured with the variations of sintering temperature. It was found that the variations of electrical parameters against surge stressing current of 100 A/$\textrm{cm}^2$(8x20 ${\mu}\textrm{s}$) is not so large under the surge stress of 700 times. Among varistors, specially the varistor sintered at 134$0^{\circ}C$ exhibited the smallest variations, with %$\Delta$ $V_{lmA}$=+0.23%, %$\Delta$$\alpha$=+0.23%, %$\Delta$ $I_{L}$=0%, %$\Delta$tan$\delta$=-6.94%. The clamping voltage ratio( $V_{c}$/ $V_{lmA}$) of all varistors was less than 2.2.2.2.2.2.2.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.24 no.3
• /
• pp.161-168
• /
• 2019

This study introduces a new topology to decrease the voltage stress experienced by a 13.56 MHz electrical variable capacitor (EVC) circuit with an asymmetrical switch structure applied to the impedance matching circuit of a radio frequency (RF) plasma system. The method adopts a symmetrical switch structure instead of an asymmetrical one in each of the capacitor's leg in the EVC circuit. The proposed topology successfully reduces voltage stress in the EVC circuit due to the symmetrical charging and discharging mode. This topology can also be applied to the impedance matching circuit of a high-power and high-frequency RF etching system. The target features of the proposed circuit topology are investigated via simulation and experiment. Voltage stress on the switch of the EVC circuit is successfully reduced by more than 40%.

• Journal of Power Electronics
• /
• v.18 no.5
• /
• pp.1303-1314
• /
• 2018

To match the dynamic lower voltage of a fuel cell stack and the required constant higher voltage (400V) of a DC bus, an H-type structural Boost three-level DC-DC converter with a wide voltage-gain range (HS-BTL) is presented in this paper. When compared with the traditional flying-capacitor Boost three-level DC-DC converter, the proposed converter can obtain a higher voltage-gain and does not require a complicate control for the flying-capacitor voltage balance. Moreover, the proposed converter, which can draw a continuous and low-rippled current from an input source, has the advantages of a wide voltage-gain range and low voltage stress for power semiconductors. The operating principle, parameters design and a comparison with other converters are presented and analyzed. Experimental results are also given to verify the aforementioned characteristics and theoretical analysis. The proposed converter is suitable for application of fuel cell systems.

• Proceedings of the IEEK Conference
• /
• 2000.07b
• /
• pp.933-936
• /
• 2000

N-channel poly-Si TFT, processed by Solid Phase Crystalline(SPC) on a glass substrate, has been investigated by measuring its electrical properties before and after stressing. It is observed that the threshold voltage shift due to electrical stress varies with various stress conditions. Threshold voltages measured in 1.5um and 3um poly-Si TFT’s are 3.3V, 37V respectively. With the threshold voltage shift, the degradation of transconductance and subthreshold swing is also observed.

• Proceedings of the KIEE Conference
• /
• 1994.11a
• /
• pp.104-106
• /
• 1994

In this study, electrical stress of the steep-fronted surge voltage which is distributed into motor winding in switching has been analyzed by multiple-conductor transmission equation. We see that the greatest electrical stress appears at the last turn of the first coil of motor.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.14 no.3
• /
• pp.6-14
• /
• 2000

The high efficiency multi-resonant converter(MRC) is capable of operating at a high frequency because the losses are decreased due to the resonant tank circuit. Such a few MHz high frequency applications provide high power density[W/inch3] of the converter. However, the resonant voltage stress across the switch of the resonant tank circuit is 4∼5 times input voltage. This high voltage stress increases the conduction losses because of on-resistance of a MOSFET with higher rating. In this paper, the modeling analysis for the AT Forward MRC suggested to solve the these problems is discusses. The operational modes of the AT Forward MRC are divided to 8 equivalent modes according to the two switching sequences. Each mode analysis is covered using the equivalent circuits modeled over all of the paper. The operational principle of the resonant converter was verified through the experimental converter with 48[V] input voltage, 5[V]/50[W] output voltage/power and PSpice simulation. The measured maximum voltage, 5[V]/50[W] output voltage/power and PSpice simulation. The measure maximum voltage stress is 170[V] of 2.9 times the input voltage and the maximum efficiency is measured to 81.66%.

• Journal of Electrical Engineering and Technology
• /
• v.11 no.6
• /
• pp.1656-1663
• /
• 2016

A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.

• Journal of Power Electronics
• /
• v.12 no.4
• /
• pp.528-537
• /
• 2012

This paper presents an interleaved resonant converter with a parallel-series transformer connection in order to achieve ripple current reduction at the output capacitor, zero voltage turn-on for the active switches, zero current turn-off for the rectifier diodes, less voltage stress on the rectifier diodes, and less current stress on the transformer primary windings. The primary windings of the two transformers are connected in parallel in order to share the input current and to reduce the root-mean-square (rms) current on the primary windings. The secondary windings of the two transformers are connected in series in order to ensure that the transformer primary currents are balanced. A full-wave diode rectifier is used at the output side to clamp the voltage stress of the rectifier diode at the output voltage. Two circuit modules are operated with the interleaved PWM scheme so that the input and output ripple currents are reduced. Based on the resonant behavior, all of the active switches are turned on under zero voltage switching (ZVS), and the rectifier diodes are turned off under zero current switching (ZCS) if the operating switching frequency is less than the series resonant frequency. Finally, experiments with a 1kW prototype are described to verify the effectiveness of the proposed converter.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.11b
• /
• pp.205-208
• /
• 2001

Steady state and transient thermal analysis has been done by a finite element method in a diode of 12kV blocking voltage for microwave oven. The diode was fabricated by soldering ten pieces of 1200V diodes in series, capping a dummy wafer at the far end of diode series, and finally copper wire bonded for building anode and cathode terminal. In order to achieve high voltage and reliability, the edge of each diode was beveled and passivated by resin and epoxy with a thickness of $25{\mu}m$ and $3700{\mu}m$, respectively. The chip size, thickness and material properties were very important factor for high voltage diode package. And also, thermal stress value was highest in the edge of diode and solder. So, design of edge in silicon was very important to thermal stress.