• 제목/요약/키워드: stress voltage

검색결과 1,070건 처리시간 0.027초

A Cascaded Multilevel Inverter Using Bidirectional H-bridge Modules

  • Kang, Feel-Soon;Joung, Yeun-Ho
    • Journal of international Conference on Electrical Machines and Systems
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    • 제1권4호
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    • pp.448-456
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    • 2012
  • This paper presents a multilevel inverter configuration which is designed by insertion of a bidirectional switch between capacitive voltage sources and a conventional H-bridge module. The modified inverter can produce a better sinusoidal waveform by increasing the number of output voltage levels. By serial connection of two modified H-bridge modules, it is possible to produce 9 output voltage levels including zero. There are 24 basic switching patterns with the 9 output voltage levels. Among the patterns, we select the 2 most efficient switching patterns to get a lower switching loss and minimum dv/dt stress. We then analyze characteristics of Total Harmonic Distortion (THD) of the output voltage with variation of input voltage by computer-aided simulations and experiments.

Harmonic Analysis of Reactor and Capacitor in Single-tuned Harmonic Filter Application

  • Kim, Jong-Gyeum;Park, Young-Jeen;Lee, Dong-Ju
    • Journal of Electrical Engineering and Technology
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    • 제6권2호
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    • pp.239-244
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    • 2011
  • Industrial power distribution system includes many kinds of non-linear loads, which produce the harmonics during energy conversion transition. The single-tuned passive filter is widely used to absorb the harmonics and attenuate its undesirable effect in the distribution system. However, the passive filter might be severely stressed, and sometimes even damaged, due to the absorption of harmonics. There is voltage rise on the capacitor when the single-turned harmonic filter is applied. When the capacitor voltage rose above the allowable limit, the expected life of the capacitor will considerably deteriorate. On the other hand, the reactor can experience the spike voltage even if the voltage and current of the capacitor are within the allowable limit, and this accumulated voltage stress of the reactor causes its premature fault. In this paper, we analyzed and compared the harmonic voltage and current of the reactor and capacitor in a single-tuned harmonic filter through the EMTP software and verified them with the experimental results.

A Novel Two-Switch Active Clamp Forward Converter for High Input Voltage Applications

  • Kim, Jae-Kuk;Oh, Won-Sik;Moon, Gun-Woo
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2008년도 하계학술대회 논문집
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    • pp.520-522
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    • 2008
  • A novel two-switch active clamp forward converter suitable for high input voltage applications is proposed. The main advantage of the proposed converter, compared to the conventional active forward converters, is that circuit complexity is reduced and the voltage stress of the main switches is effectively clamped to either the input voltage or the clamping capacitor voltage by two clamping diodes without limiting the maximum duty ratio. Also, the clamping circuit does not include additional active switches, so a low cost can be achieved without degrading the efficiency. Therefore, the proposed converter can feature high efficiency and low cost for high input voltage applications. The operational principles, features, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 200W, 375V input, and 12V output.

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A novel integrated a-Si:H gate driver

  • Lee, Jung-Woo;Hong, Hyun-Seok;Lee, Eung-Sang;Lee, Jung-Young;Yi, Jun-Shin;Bae, Byung-Seong
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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    • pp.1176-1178
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    • 2007
  • A novel integrated a-Si:H gate driver with high reliability has been designed and simulated. Since the a-Si:H TFT is easily degraded by gate bias stress, we should optimize the circuit considering the threshold voltage shift. The conventional circuit shows voltage drop at the input stage by threshold voltage of the TFT, however, the proposed circuit dose not shows voltage drop and keeps constant regardless of threshold voltage shift of the TFT.

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Z-Source 인버터 (Z-Source Inverter)

  • 최형래;정태욱;전장건;우도;이동헌;강필순;최준호;박성준
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2006년도 전력전자학술대회 논문집
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    • pp.545-548
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    • 2006
  • This paper presents control method of a Z-source inverter and their relationships of voltage boost versus modulation index. A maximum boost control is presented to produce the maximum voltage boost(or voltage gain)under a given modulation index. The control method, relationships of voltage gain versus modulation index, and voltage stress versus voltage gain are analyzed in detail and verified by experiment.

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An Interleaved Five-level Boost Converter with Voltage-Balance Control

  • Chen, Jianfei;Hou, Shiying;Deng, Fujin;Chen, Zhe;Li, Jian
    • Journal of Power Electronics
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    • 제16권5호
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    • pp.1735-1742
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    • 2016
  • This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.

Three-Level SEPIC with Improved Efficiency and Balanced Capacitor Voltages

  • Choi, Woo-Young;Lee, Seung-Jae
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.447-454
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    • 2016
  • A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

출력 전압 밸런싱 기능을 가진 비절연형 3-레벨 고승압 부스트 컨버터 (A Non-Isolated 3-Level High Step-Up Boost Converter With Output Voltage Balancing)

  • 윤성현;강혜민;차헌녕;김흥근
    • 전력전자학회논문지
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    • 제20권5호
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    • pp.464-470
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    • 2015
  • In this paper, a non-isolated three-level high step-up boost converter with output voltage balancing is proposed. By adding one extra inductor to the conventional three-level boost converter, the proposed converter is derived. Compared with the traditional boost converter and the three-level boost converter, the proposed converter can obtain very high voltage conversion ratio, and the voltage and current stress of switching devices and diodes are reduced. A 2.7 kW prototype converter is built and tested to verify performances of the proposed converter.

Switched Capacitor Based High Gain DC-DC Converter Topology for Multiple Voltage Conversion Ratios with Reduced Output Impedance

  • Priyadarshi, Anurag;Kar, Pratik Kumar;Karanki, Srinivas Bhaskar
    • Journal of Power Electronics
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    • 제19권3호
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    • pp.676-690
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    • 2019
  • This paper presents a switched capacitor (SC) based bidirectional dc-dc converter topology for high voltage gain applications. The proposed converter is able to operate with multiple integral voltage conversion ratios based on user input. The architecture of a user-friendly, inductor-less multi-voltage-gain bidirectional dc-dc converter is proposed in this study. The inductor-less or magnetic-less design of the proposed converter makes it effective in higher temperature applications. Furthermore, the proposed converter has a reduced component count and lower voltage stress across its switches and capacitors when compared to existing SC converters. An output impedance analysis of the proposed converter is presented and compared with popular existing SC converters. The proposed converter is simulated in the OrCAD PSpice environment and the obtained results are presented. A 200 W hardware prototype of the proposed SC converter has been developed. Experimental results are presented to validate the efficacy of the proposed converter.

결정질 실리콘 태양전지 모듈의 Potential Induced Degradation(PID) 현상 (Potential Induced Degradation(PID) of Crystalline Silicon Solar Modules)

  • 배수현;오원욱;김수민;김영도;박성은;강윤묵;이해석;김동환
    • 한국재료학회지
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    • 제24권6호
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    • pp.326-337
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    • 2014
  • The use of solar energy generation is steadily increasing, and photovoltaic modules are connected in series to generate higher voltage and power. However, solar panels are exposed to high-voltage stress (up to several hundreds of volts) between grounded module frames and the solar cells. Frequent high-voltage stress causes a power-drop in the modules, and this kind of degradation is called potential induced degradation (PID). Due to PID, a significant loss of power and performance has been reported in recent years. Many groups have suggested how to prevent or reduce PID, and have tried to determine the origin and mechanism of PID. Even so, the mechanism of PID is still unclear. This paper is focused on understanding the PID of crystalline-silicon solar cells and modules. A background for PID, as well as overviews of research on factors accelerating PID, mechanisms involving sodium ions, PID test methods, and possible solutions to the problem of PID, are covered in this paper.