• Journal of Mechanical Science and Technology
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• v.20 no.3
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• pp.358-365
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• 2006

The hydraulic pump of an Electro-hydrostatic Actuator should be able to quickly feed large volume of oil into hydraulic cylinder in order to reduce the response time. On the other hand, it should be also able to precisely dispense small amount of oil through low-speed operation so that the steady state position control error of the actuator can be accurately compensated. Within the scope of axial piston type hydraulic pumps, this paper is focused on the investigation how the surface treatment of their cylinder barrel with TiN plasma coating can contribute to the reduction of the friction and wear rate of valve plate in the low-speed range with mixed lubrication. The results showed that the friction torque of the valve plate mated with a TiN coated cylinder barrel could be reduced to 22% of that with an uncoated original one when load pressure was 300 bar and rotational speed 100 rpm. It means that the torque efficiency of the test pump was expected to increase more than 1.3% under the same working condition. At the same time, the wear rate of the valve plate could be reduced to $40\sim50%$.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.93-98
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• 2002

This paper introduces the design of high-speed analog-to-digital converter (ADC) for hard disk drive (HDD) read channel applications. This circuit is bated on fast regenerative autozero comparator for high speed and low-error rate comparison operation, and Double Speed Dual ADC (DSDA) architecture for efficiently increasing the overall conversion speed of ADC. A new type of thermometer-to-binary decoder appropriate for the autozero architecture is employed for no glitch decoding, simplifying the conventional structure significantly. This ADC is designed for 6-bit resolution, 800 Msample/s maximum conversion rate, 390 mW power dissipation, one clock cycle latency in 0.65 m CMOS technology.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.11 no.5
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• pp.185-192
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• 2011

In this paper, we simulate and analyze performance of iterative coding scheme, double binary turbo code, for high speed power line communication (PLC) systems. PLC system has hostile environment for high speed data transmission, so error correction method is necessary to compensate effects of PLC channel. We employ the PLC model proposed by M. Zimmerman and Middleton Class A interference model, and system performance is evaluated in terms of bit error rate (BER). From the simulation results, we confirm double binary turbo code provides considerable coding gains to PLC system and BER performance is significantly improved as the number of iteration increase. It is also confirmed that BER performance increases as code rate is lager, while it decreases as the code rate is smaller.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.8
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• pp.1032-1038
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• 2021

Rate of penetration(ROP) is one of the important variables for maximizing the drilling performance. In order to maximize drilling efficiency, it is necessary to increase the drilling speed, and real-time ROP prediction is important so that the driller can identify problems during drilling. The ROP has a high correlation with the drillstring rotational speed, weight on bit, and flow rate. In this paper, the ROP was predicted using a data-driven supervised learning model trained from the drilling efficiency parameters. As a result of comparison through the performance evaluation metrics of the regression model, the root mean square error(RMSE) of the RF model was 4.20 and the mean absolute percentage error(MAPE) was 9.08%, confirming the best predictive performance. The proposed method can be used as a base model for ROP prediction when constructing a real-time drilling operation guide system.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1241-1246
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• 2005

This paper described an 8bit, 100Msample/s CMOS D/A converter using a glich-time minimization technique for the high-speed sampling rate of 100MHz level. The proposed DAC was implemented in 0,35um Hynix CMOS technology and adopts a current mode architecture to optimize sampling rate, resolution, chip area. The DAC linear characteristics was similar to the proposed specification the prototype error between DNL and INL is less than ${\pm}0.09LSB$ respectively. Also, fab-out chip was tested, analysed the cause of error operation, and proposed the field considerations for chip test.

• 전자공학회논문지 IE
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• v.43 no.3
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• pp.6-12
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• 2006

This paper described an 8bit, 100Msample/s CMOS D/A converter using a glitch-time minimization technique for the high-speed sampling rate of 100MHz level. The proposed DAC was implemented in $0.35{\mu}m$ Hynix CMOS technology and adopts a current mode architecture to optimize sampling rate, resolution, chip area. The DAC linear characteristics was similar to the proposed specification and the prototype error between DNL and INL is less than $\pm$0.09LSB respectively. Also, the manufactured DAC chip was analyzed the cause of error operation and proposed the field considerations for chip test.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.1
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• pp.59-66
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• 1998

In this paper, the high-speed decoder for RS(Reed-Solomon) code, one of the most popular error correcting code, is implemented using VHDL. This RS decoder is designed in transform domain instead of most time domain. Because of the simplicity in structure, transform decoder can be easily realized VLSI chip. Additionally the pipeline architecture, which is similar to a systolic array is applied for all design. Therefore, This transform RS decoder is suitable for high-rate data transfer. After synthesis with FPGA technology, the decoding rate is more 43 Mbytes/s and the area is 1853 LCs(Logic Cells). To compare with other product with pipeline architecture, this result is admirable. Error correcting ability and pipeline performance is certified by computer simulation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.5
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• pp.1-11
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• 1979

Since the second half of 1960's one of the information industry's most vital, yet least-well-understood areas has evolved-Data communications/Computer communications. To successfully realize this field we have to identity and reveal a variety of fundermental characteristics of communications channels and see their high reliability as prerequisites. This paper has accumulated related data from 1973 on, systematically analyzed them and provided some basic back ground and suggestions. Error rate which is the final and external characteristics of communication lines according to channal types, communication types and speed, block length and geographical difference between test points was extensively examined as well as their frequency response and d-c characteristics. The perspective of 9600BPS high speed data communications was also discussed.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.12a
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• pp.9-12
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• 2000

In this paper, we carry out a performance study related to the Advanced Peer-to-Peer Network(APPN). For this particular network, it has been proposed to use the leaky bucket as a way of controlling congestion within the network. On the top of leaky bucket type rate based congestion control scheme for high speed networks, a user will typically operate an error control scheme for retransmitting lost and erroneous packets. We propose a Perform ance model in order to study the Interaction between a user's error control scheme and the leaky bucket congestion control scheme for high speed networks. Simulation results show that parameters such as the window size and the token generation rate in the leaky bucket are key factors affecting the end-to-end delay.

• Journal of Environmental Science International
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• v.18 no.10
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• pp.1115-1121
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• 2009

The purpose of this study is to estimate the impact of rainfall measurement according to the installation conditions of rain gauges: windbreak, grass mat, installation elevation or obstacle. Rain gauges were installed by the standards of Korea Meteorological Administration(KMA), and the rainfall measurement was conducted daily unit during two years(2007~2008). In conclusion, observed error of rain gauge did not affect whether windbreak was installed or not. If there is the obstacle around rain gauge, average error rate was increased about 3.3%: (2007year-2.49%, 2008year-4.10%). If rain gauge is located in a high place, average error rate was increased about 4.89%. Additionally, the observed error of rain gauge according to the wind speed has a positive correlation with obstacle and installation elevation and has a negative correlation with windbreak and has no affection with grass mat.