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http://dx.doi.org/10.3745/KIPSTA.2002.9A.1.093

Design of 6-bit 800 Msample/s DSDA A/D Converter for HDD Read Channel  

Jeong, Dae-Yeong (삼성전자 근무)
Jeong, Gang-Min (성균관대 전기·전자 및 컴퓨터공학부)
Publication Information
The KIPS Transactions:PartA / v.9A, no.1, 2002 , pp. 93-98 More about this Journal
Abstract
This paper introduces the design of high-speed analog-to-digital converter (ADC) for hard disk drive (HDD) read channel applications. This circuit is bated on fast regenerative autozero comparator for high speed and low-error rate comparison operation, and Double Speed Dual ADC (DSDA) architecture for efficiently increasing the overall conversion speed of ADC. A new type of thermometer-to-binary decoder appropriate for the autozero architecture is employed for no glitch decoding, simplifying the conventional structure significantly. This ADC is designed for 6-bit resolution, 800 Msample/s maximum conversion rate, 390 mW power dissipation, one clock cycle latency in 0.65 m CMOS technology.
Keywords
HDD(Hard Disk Drive); A/D Converter;
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