• Journal of Radiation Industry
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• v.6 no.1
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• pp.31-40
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• 2012

There are two methods to fabricate the readout electronic to a large-area CMOS image sensor (LACIS). One is to design and manufacture the sensor part and signal processing electronics in a single chip and the other is to integrate both parts with bump bonding or wire bonding after manufacturing both parts separately. The latter method has an advantage of the high yield because the optimized and specialized fabrication process can be chosen in designing and manufacturing each part. In this paper, LACIS chip, that is optimized design for the latter method of fabrication, is presented. The LACIS chip consists of a 3-TR pixel photodiode array, row driver (or called as a gate driver) circuit, and bonding pads to the external readout ICs. Among 4 types of the photodiode structure available in a standard CMOS process, $N_{photo}/P_{epi}$ type photodiode showed the highest quantum efficiency in the simulation study, though it requires one additional mask to control the doping concentration of $N_{photo}$ layer. The optimized channel widths and lengths of 3 pixel transistors are also determined by simulation. The select transistor is not significantly affected by channel length and width. But source follower transistor is strongly influenced by length and width. In row driver, to reduce signal time delay by high capacitance at output node, three stage inverter drivers are used. And channel width of the inverter driver increases gradually in each step. The sensor has very long metal wire that is about 170 mm. The repeater consisted of inverters is applied proper amount of pixel rows. It can help to reduce the long metal-line delay.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.1-7
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• 2020

Directivity control technology of sound system is a key technology for improving sound quality. Providing a line source rather than a point source in an acoustic system can reduce the effects of attenuation interference at long distances, thereby providing high quality sound. In particular, A line-array speaker system can be used to provide coherent, high-quality sound over long distances. However, high frequencies have shorter wavelengths, so the distance between the speakers of a line array system must be shorter, but there are physical limitations. In this paper, we designed a wave guide and installed it in the speaker's compression driver to solve this problem. We measured and tested various acoustic characteristics to verify the performance of the speaker. As a result, when the line array sound system is constructed using the developed speakers, it is possible to provide a line source in all areas including the treble range, thereby achieving the same effect as a single extended source and providing high quality sound up to far distances.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.1
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• pp.64-68
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• 2015

In this paper, LED lighting system is realized by using Bluetooth wireless communications and smartphones. A bluetooth module with a lighting control function is manufactured by miniaturizing a development board of TI company and the volume of LED dimming system as a whole is reduced. And a trial product is materialized by designing a hardware composed of the manufactured bluetooth module, LED down light equipped with degree warm white and cool white, and 2-channel LED driver; and LED dimming software. The materialized trial product is controled in terms of the brightness and color temperature of LED light source using an application of a smartphone. The experiment showed that the users can easily control the intensity of illumination of LED light source by using the scroll bar of the applications of smartphones. In addition, the color temperatures of both warm white and cool white can be controlled, and when the color temperature of the trial product using the manufactured bluetooth module is compared with that of a trial product of TI company, they show the same color temperatures.

• Journal of electromagnetic engineering and science
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• v.14 no.2
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• pp.68-73
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• 2014

A linear stacked field-effect transistor (FET) power amplifier (PA) is implemented using a $0.18-{\mu}m$ silicon-on-insulator CMOS process for W-CDMA handset applications. Phase distortion by the nonlinear gate-source capacitance ($C_{gs}$) of the common-source transistor, which is one of the major nonlinear sources for intermodulation distortion, is compensated by employing a PMOS linearizer with improved AM-PM. The linearizer is used at the gate of the driver-stage instead of main-stage transistor, thereby avoiding excessive capacitance loading while compensating the AM-PM distortions of both stages. The fabricated 836.5 MHz linear PA module shows an adjacent channel leakage ratio better than -40 dBc up to the rated linear output power of 27.1 dBm, and power-added efficiency of 45.6% at 27.1 dBm without digital pre-distortion.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.20 no.44
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• pp.463-473
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• 1997

In this paper, driver's judgements for the priorities of vehicle devices were studied to establish the standard of design of inside devices. The differences within drivers who have different careers were also studied. For this study, two experiments were conducted. First experiment was peformed in terms of total devices in the vehicle cockpit, and second was peformed in terms of the visual devices that these were the source of visual information. These experiments were analyzed using AHP (Analytic Hierarchy Process) method. The result showed the priorities of devices and little relationship between the career and the judgement. Especially, it was shown that the novice tended to depend on the information from visual devices.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.1
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• pp.29-34
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• 2016

A controller area network (CAN) controller is an integral part of an electronic control unit, particularly in an advanced driver assistance system application, and its characteristics should always be advantageous in all aspects of functionality especially in real time application. The cost should be low, while maintaining the functionality and reliability of the technology. However, a CAN protocol implementing serial operation results in slow throughput, especially in a cyclical redundancy checking (CRC) unit. In this paper, digital signal processing (DSP) algorithms are implemented, namely pipelining, unfolding, and retiming the CAN controller in the CRC unit, particularly for the encoder and decoder sections. It must attain a feasible iteration bound, a critical path that is appropriate for a CAN system, and must obtain a superior design of a high-speed parallel circuit for the CRC unit in order to have a faster transmission rate. The source code for the encoder and decoder was formulated in the Verilog hardware description language.

• The Magazine of the IEIE
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• v.37 no.8
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• pp.50-59
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• 2010

$0.18-{\mu}m$ high voltage technology 13.5V high voltage well-based symmetric EDMOS isolated by MTI was designed and fabricated. Using calibrated process and device model parameters, the characteristics of the symmetric and asymmetric EDMOS have been simulated. The asymmetric EDMOS has higher performance, better $R_{sp}$ / BVDSS figure-of-merit, short-channel immunity and smaller pitch size than the symmetric EDMOS. The asymmetric EDMOST is a good candidate for low-power and smaller source driver chips. The low voltage logic well-based EDMOS process has advantages over high voltage well-based EDMOS in process cost by eliminating the process steps of high-voltage well/drift implant, high-temperature long-time thermal steps, etc. The specific on-resistance of our well-designed logic well-based EDMOSTs is compatible with the smallest one published. TCAD simulation and measurement results show that the improved logic well-based nEDMOS has better electrical characteristics than those of the conventional one. The improved EDMOS proposed in this paper is an excellent candidate to be integrated with low voltage logic devices for high-performance low-power low-cost chips.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.24 no.2
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• pp.102-107
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• 2014

The engine excitation forces are considered as major vibration source for the forklift truck, especially in small class. Even though the current engine mounting system designs are acceptable for vibration isolation, the performance of the engine mounting system is still required for the tendency of light weight, higher power and driver's higher vibration requirement. In this paper vibration reduction technique of forklift engine which is supported on rubber mounts is presented. Based on the dynamic model of resilient engine mounting system, design evaluation program is established. The design optimization technique and evaluation method of system properties are discussed. Effects of optimal design are validated through comparison with test results.

• East Asian Economic Review
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• v.16 no.3
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• pp.227-247
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• 2012

This paper investigates the source of bilateral trade imbalance at industry level. We build a simple model based on gravity theory and derive the prediction that the bilateral trade balance in an industry is increasing in the difference between trading partners in the output share of the industry. We test this prediction and find that the difference in industry share is highly significant in predicting both the sign and the magnitude of trade balance at industry level. We also find that FTAs tend to enlarge trade imbalance at industry level. However, the overall predictive power of the model is rather limited, suggesting that factors other than production specialization are important in determining trade balance at industry level. Another finding of the paper is that the influence of the difference in industry share on trade balance increases as we move to industries that produce more homogeneous products. This finding calls into question monopolistic competition as the main driver of gravity in international trade.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1316-1323
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• 2016

Multilevel inverters (MLIs) have been preferred over conventional two-level inverters due to their inherent properties such as reduced harmonic distortion, lower electromagnetic interference, minimal common mode voltage, ability to synthesize medium/high voltage from low voltage sources, etc. On the other hand, they suffer from an increased number of switching devices, complex gate pulse generation, etc. This paper develops an ingenious symmetrical MLI topology, which consumes lesser component count. The proposed level dependent sources concoction multilevel inverter (LDSCMLI) is basically a multilevel dc link MLI (MLDCMLI), which first synthesizes a stepped dc link voltage using a sources concoction module and then realizes the ac waveform through a conventional H-bridge. Seven level and eleven level versions of the proposed topology are simulated in MATLAB r2010b and prototypes are constructed to validate the performance. The proposed topology requires lesser components compared to recent component reduced MLI topologies and the classical topologies. In addition, it requires fewer carrier signals and gate driver circuits.