• Title/Summary/Keyword: source driver

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A Study on the Design of the Voltage Down Converter for Low Power, High Speed DRAM (DRAM의 저전력, 고속화에 따른 VDC 설계에 관한 연구)

  • 주종두;곽승욱
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.707-710
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    • 1998
  • This paper presents a new voltage down converter(VDC) for low power, high speed DRAM. This VDC Consists of RVG(Reference Voltage Generator) and Driver Circuit. And it is independent of temperature variation, and Supply Voltage. Using weak inversion region, this RVG dissipates low power. Internal Voltage Source of this VDC is stable in spite of high speed operation of memory array. This circuit is designed with a $0.65\mu\textrm{m}$ nwell CMOS technology. In HSPICE simulation results, Temperature dependency of this RVG is $20\muV/^{\circ}C,$ supply voltage dependency is $\pm0.17%,$ $VCC=3.3V\pm0.3V,$ and current dissipation is $5.22\muA.$ Internal voltage source bouncing of this VDC is smaller than conventional VDC.

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Current Saturation Improvement of Poly-Si TFTs for Analog Circuit Integration

  • Nam, Woo-Jin;Han, Sang-Myeon;Lee, Hye-Jin;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.289-292
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    • 2005
  • New poly-Si TFTs have been proposed and fabricated in order to increases the output channel resistance ($r_o$). The counter-doped($p^+$) source is tied to the $n^+$ source and is extended into the channel region so that it employs the reverse bias depletion in the channel. As $V_{DS}$ is increased, the depletion width is increased and the effective channel width is reduced. Therefore, the output current saturates well and the $r_o$ is increased successfully. The proposed CMOS devices may improve the amplifier gain of data driver in active-matrix displays

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CoolSiCTM SiC MOSFET Technology, Device and Application

  • Ma, Kwokwai
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.577-595
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    • 2017
  • ${\bullet}$ Silicon Carbide (SiC) had excellent material properties as the base material for next generation of power semiconductor. In developing SiC MOSFET, gate oxide reliability issues had to be first overcome before commercial application. Besides, a high and stable gate-source voltage threshold $V_{GS(th)}$ is also an important parameter for operation robustness. SiC MOSFET with such characteristics can directly use existing high-speed IGBT gate driver IC's. ${\bullet}$ The linear voltage drop characteristics of SiC MOSFET will bring lower conduction loss averaged over full AC cycle compared to similarly rate IGBT. Lower switching loss enable higher switching frequency. Using package with auxiliary source terminal for gate driving will further reduce switching losses. Dynamic characteristics can fully controlled by simple gate resistors. ${\bullet}$ The low switching losses characteristics of SiC MOSFET can substantially reduce power losses in high switching frequency operation. Significant power loss reduction is also possible even at low switching frequency and low switching speed. in T-type 3-level topology, SiC MOSFET solution enable three times higher switching freqeuncy at same efficiency.

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A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit

  • Mohd. Ali, Jagabar Sathik;Kannan, Ramani
    • Journal of Power Electronics
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    • v.15 no.4
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    • pp.951-963
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    • 2015
  • In this paper, a new symmetric multilevel inverter is proposed. A simple structure for the cascaded multilevel inverter topology is also proposed, which produces a high number of levels with the application of few power electronic devices. The symmetric multilevel inverter can generate 2n+1 levels with a reduced number of power switches. The basic unit is composed of a single and double source unit (SDS-unit). The application of this SDS-unit is for reducing the number of power electronic components like insulated gate bipolar transistors, freewheeling diodes, gate driver circuits, dc voltage sources, and blocked voltages by switches. Various new algorithms are recommended to determine the magnitude of dc sources in a cascaded structure. Furthermore, the proposed topology is optimized for different goals. The proposed cascaded structure is compared with other similar topologies. For verifying the performance of the proposed basic symmetric and cascaded structure, results from a computer-based MATLAB/Simulink simulation and from experimental hardware are also discussed.

Low Power Dual-Level LVDS Technique using Current Source Switching (전류원 스위칭에 의한 저전력 듀얼레벨 차동신호 전송(DLVDS) 기법)

  • Kim, Ki-Sun;Kim, Doo-Hwan;Cho, Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.59-67
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    • 2007
  • This paper presents a low power dual-level low voltage differential signaling (DLVDS) technique using current source switching for LCD driver ICs in portable products. The transmitter makes dual level signal that has two different level signal 400mVpp and 250mVpp while keeping the advantages of LVDS. The decoding circuit recovers the primary signal from DLVDS. The low power DLVDS is implemented using a $0.25{\mu}m$ CMOS process under 2.5V supply. The proposed circuit shows 800Mbps/2-line data rate and 9mW, 11.5mW power consumptions in transmitter and receiver, respectively. The proposed DLVDS scheme reduce power consumption dramatically compare with conventional one.

A Single-Ended Transmitter with Variable Parallel Termination (가변 병렬 터미네이션을 가진 단일 출력 송신단)

  • Kim, Sang-Hun;Uh, Ji-Hun;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.490-492
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    • 2010
  • A swing level controlled voltage-mode transmitter is proposed to support a stub series-terminated logic channel with center-tapped termination. This transmitter provides a swing level control to support the diagnostic mode and improve the signal integrity in the absence of the destination termination. By using the variable parallel termination, the proposed transmitter maintains the constant output impedance of the source termination while the swing level is controlled. Also, the series termination using an external resistor is used to reduce the impedance mismatch effect due to the parasitic components of the capacitor and inductor. To verify the proposed transmitter, the voltage-mode driver, which provides eight swing levels with the constant output impedance of about $50{\Omega}$, was implemented using a 70nm 1-poly 3-metal DRAM process with a 1.5V supply. The jitter reduction of 54% was measured with the swing level controlled voltage-mode driver in the absence of the destination termination at 1.6-Gb/s.

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Real Time Linux System Design (리얼 타임 리눅스 시스템 설계)

  • Lee, Ah Ri;Hong, Seon Hack
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.10 no.2
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    • pp.13-20
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    • 2014
  • In this paper, we implemented the object scanning with nxtOSEK which is an open source platform. nxtOSEK consists of device driver of leJOS NXJ C/Assembly source code, TOPPERS/ATK(Automotive real time Kernel) and TOPPERS/JSP Real-Time Operating System source code that includes ARM7 specific porting part, and glue code make them work together. nxtOSEK can provide ANSI C by using GCC tool chain and C API and apply for real-time multi tasking features. We experimented the 3D scanning with ultra sonic and laser sensor which are made directly by laser module diode and experimented the measurement of scanning the object by knowing x, y, and z coordinates for every points that it scans. In this paper, the laser module is the dimension of $6{\times}10[mm]$ requiring 5volts/5[mW], and used the laser light of wavelength in the 650[nm] range. For detecting the object, we used the beacon detection algorithm and as the laser light swept the objects, the photodiode monitored the ambient light at interval of 10[ms] which is called a real time. We communicated the 3D scanning platform via bluetooth protocol with host platform and the results are displayed via DPlot graphic tool. And therefore we enhanced the functionality of the 3D scanner for identifying the image scanning with laser sensor modules compared to ultra sonic sensor.

DESIGN OF OPERATOR FOR SEARCHING TRAFFIC DEPENDENT SHORTEST PATH IN A ROAD NETWORK

  • Lee Dong Gyu;Lee Yang Koo;Jung Young Jin;Ryu Keun Ho
    • Proceedings of the KSRS Conference
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    • 2005.10a
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    • pp.759-762
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    • 2005
  • Recently, Intelligent Transportation System(ITS) has been applied to satisfy increasing traffic demand every year and to solve many traffic problems. Especially, Advanced Traveller Information System(ATIS) is a transportation system to optimize the trip of each other vehicle. It is important to provide the driver with quick and comfortable path from source to destination. However, it is difficult to provide a shortest path in a road network with dynamic cost. Because the existing research has a static cost. Therefore, in this paper we propose an operator for searching traffic dependent shortest path. The proposed operator finds the shortest path from source to destination using a current time cost and a difference cost of past time cost. Such a method can be applied to the road status with time. Also, we can expect a predicted arrival time as well as the shortest path from source to destination. It can be applied to efficiently application service as ITS and have the advantages of using the road efficiently, reducing the distribution cost, preparing an emergency quickly, reducing the trip time, and reducing an environmental pollution owing to the saving the fuel.

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Design and Implementation of a New Multilevel DC-Link Three-phase Inverter

  • Masaoud, Ammar;Ping, Hew Wooi;Mekhilef, Saad;Taallah, Ayoub;Belkamel, Hamza
    • Journal of Power Electronics
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    • v.14 no.2
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    • pp.292-301
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    • 2014
  • This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.

Design and Implementation of OLED Display Driver IC (OLED 디스플레이 구동 IC 설계 및 구현)

  • Lee, Seung-Eun;Oh, Won-Seok;Park, Jin;Lee, Sung-Chul;Choi, Jong-Chan
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.293-296
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    • 2002
  • This paper proposes new driving methods for designing a driver independent of the current property of organic light emitting diodes (OLED) displays. The proposed methods are the Look-Up Table (LUT) and the Pulse Width Modulation (PWM). The LUT is used to handle the amount of the current for driving the OLED display panel and the PWM is applied to represent the gray scale on the OLED display panel. Segment and common drivers were implemented using delay circuits to prevent short-circuit current and a DC-DC converter was designed to supply the drivers with a power source. In particular, tile proposed methods are used for the manufacturing of 1.8" 128$\times$128 dot passive matrix OLED display panel. The designed circuit was fabricated using 0.6w, 2-poly, 3-metal, CMOS process and applied to the Personal Communication System (PCS) phone successfully.ully.

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