• 마이크로전자및패키징학회지
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• 제15권4호
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• pp.87-92
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• 2008

본 논문에서는 Cu위에 Zn를 전기도금 한 후, Sn-3.5Ag 솔더와 반응에 의해서 형성되는 계면의 금속간 화합물의 변화를 관찰하였으며, 그에 따른 계면의 충격 신뢰성을 분석하였다. Sn-3.5Ag 솔더와 Zn 표면층이 반응하는 동안, Zn 표면층은 솔더 내부로 들어가며, 그 양은 Zn의 도금 두께에 비례하였다. 특히, Zn가 솔더 내로 들어가면서, 계면에서 Cu-Sn 금속간화합물을 억제하는 대신, $Cu_5Zn_8$와 $Ag_5Zn_8$이 형성되고, 이로 인해 계면의 충격 신뢰성이 크게 증가하였다. 또한, 솔더 내에 Zn가 약 3.8wt%정도 들어갔을 때 가장 우수한 계면 신뢰성을 유도하였다.

• 전자공학회논문지A
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• 제31A권12호
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• pp.44-55
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• 1994

This study is to apply the theory of fatigue fracture to solder joints under thermal cyclic loading and predict life of solder joint to failure. A 62Sn-36Pb-2Ag solder was used in this study. Tensile tests were preformed at temperatures of 15.dec. C, 50.dec. C and 85.dec. C in order to find terms of crack length "a". plastic strain range ""${\Delta}{\varepsilon}_p$" and temperature "T". Solder joint under thermal cyclic loading was analyzed by FEM. this FEM analysis together with the crack growth rate will provide the capability of the fatigue life prediction of solder joints and enhance the reliability od solder joint.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1993년도 추계학술대회 논문집
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• pp.49-54
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• 1993

This paper discusses the reliability of solder joints of electronic devices on printed circuit board. Solder application is usually done by screen printing method for the bonding between outer leads of devices and thick film(Ag/Pd) pattern on Hybrid IC as wel1 as Cu lands on PCB. As result of thermal stresses generated at the solder joints due to the differences of thermal expansion coefficients between packge body and PCB, Micro cracking often occurs due to thermal fatigue failure at solder joints. The initiation and the propagate of solder joint crack depends on the environmental conditions, such as storage temperature and thermal cycling. The principal mechanisms of the cracking pheno- mana are the formation of kirkendal void caused by the differences in diffusion rate of materials, ant the thermal fatigue effect due to the differences of thermal expansion coefficient between package body and PCB. Finally, This paper experimentally shows a way to supress solder joints cracks by using low-${\alpha}$ PCB and the packages with thin lead frame, and investigates the phenomena of diffusion near the bonding interfaces.

• 대한금속재료학회지
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• 제47권8호
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• pp.500-507
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• 2009

Pb-free solder has recently been used in electronics in efforts to meet environmental regulations, and a number of Pb-free solder alloy choices beyond the near-eutectic SnAgCu solder are now available. With increased demand for thin and portable electronics, the high cost of alloys containing significant amounts of silver and their poor mechanical shock performance have spurred the development of low Ag SnAgCu solder, which provides improved mechanical performance at a reasonable cost. Although low Ag SnAgCu solder exhibits significantly higher fracture resistance under high-strain rates, little thermal fatigue data exist for this solder. Therefore, it is necessary to investigate thermal fatigue reliability of low Ag SnAgCu solder under variation of thermal stress in order to allow its implementation in electronic products with high reliability requirements. In this study, the reliability of Sn0.3Ag0.7Cu(SAC0307), a low Ag solder alloy, is discussed and compared with that of Sn3Ag0.5Cu(SAC305). Three sample types and six samples size are evaluated. Mechanical properties and microstructure of the solder joint are investigated under thermal shock cycles. It was observed that the mechanical strength of SAC0307 dropped slightly with thermal cycling relative to that of SAC305. This reveals that the failure mode of SAC0307 is different from that SAC305 under this critical condition.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2002년도 Proceedings of the International Welding/Joining Conference-Korea
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• pp.439-449
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• 2002

This paper reviews our recent research works on the interconnection technologies in electronic packaging and assembly. At the aspect of advanced joining methods, laser-ultrasonic fluxless soldering technology was proposed. The characteristic of this technology is that the oxide film was removed through the vibration excitated by high frequency laser change in the molten solder droplet. Application researches of laser soldering technology on solder bumping of BGA packages were carried out. Furthermore, interfacial reaction between SnPb eutectic solder and Au/Ni/Cu pad during laser reflow was analyzed. At the aspect of soldered joints' reliability, the system for predicting and analyzing SMT solder joint shape and reliability(PSAR) has been designed. Optimization design method of soldered joints' structure was brought forward after the investigation of fatigue failure of RC chip devices and BGA packages under temperature cyclic conditions with FEM analysis and experimental study. At the aspect of solder alloy design, alloy design method based on quantum was proposed. The macroproperties such as melting point, wettability and strength were described by the electron parameters. In this way, a great deal of the experimental investigations was replaced, so as to realize the design and research of any kinds of solder alloys with low cost and high efficiency.

• 마이크로전자및패키징학회지
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• 제18권4호
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• pp.1-9
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• 2011

Understanding the void characterization in the solder joints has become more important because of the application of lead free solder materials and its reliability in electronic packaging technology. According to the JEDEC 217 standard, it describes void types formed in the solder joints, and divides into some categories depending on the void position and formation cause. Based on the previous papers and the standards related to the void, reliability of the BGA solder joints is determined by the size of void, as well as the location of void inside the BGA solder ball. Prior to reflow soldering process, OSP(organic surface preservative) finished Cu electrode was exposed under $85^{\circ}C$/60%RH(relative humidity) for 168 h. Voids induced by the exposure of $85^{\circ}C$/60%RH became larger and bigger with increasing aging times. The void position has more influence on mechanical strength property than the amount of void growth does.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2004년도 국제표면실장 및 인쇄회로기판 생산기자재전:전자패키지기술세미나
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• pp.37-59
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• 2004

In the case of Ni/Au finished pad on the package side, the solder joint of SnAgCu system can bring brittle fracture under impact load such as drop test. Therefore, it's difficult to prevent the brittle fracture of lead-free solder, by controlling Cu content. The failure locus existing on the interface between $(Ni,Cu)_3Sn_4\;and\;(Cu,Ni)_6Sn_5$ IMC layers must be changed to other site in order to avoid brittle fracture due to impact load. It was not found any clear evidence that there were two IMC layers exist. But it was strongly assumed these were two layers which have different Cu-Ni composition. From the above analysis it was assumed that Cu atom in the solder alloy or substrate seemed to affect IMC composition and cause to IMC brittle fracture.

• 마이크로전자및패키징학회지
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• 제21권3호
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• pp.51-56
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• 2014

솔더조인트의 신뢰성에는 인쇄회로기판의 표면처리 특성이 많은 영향을 미치고 있다. 본 연구에서는 ENEPIG 표면처리에서 Sn-4.0wt%Ag-0.5wt%Cu (SAC405) 솔더와 Pd 촉매 처리 시간에 따른 high speed shear 에너지 및 파괴 모드를 연구하였다. 또한 Pd 촉매 처리 시간과 무전해 Ni-P 도금의 표면 거칠기 (Ra)와의 관계를 규명하였다. Pd 촉매 처리 시간이 길어질수록 Ni-P nodule의 면적은 넓어지고, Ni-P 도금의 표면 거칠기 (Ra)는 감소한다. 이러한 영향으로 질산 기상 처리한 시편의 high speed shear 평가후 quasi-brittle과 brittle 모드의 점유율은 감소한다. 이는 Pd 촉매 처리 시간의 증가가 SAC405 솔더조인트의 신뢰도를 향상시키는 역할을 한다는 것을 나타낸다.

• 대한기계학회논문집A
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• 제35권7호
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• pp.799-804
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• 2011

본 논문에서는 칩저항을 실장하는 솔더에 대한 온도사이클 시험을 수행하고, 그 결과로부터 고장 예지 실현을 위한 열하중에서의 솔더실장의 고장메커니즘을 연구하였다. 시험 중 솔더의 고장을 모니터링하기 위하여 실장된 칩저항 양단간의 저항 변화를 데이터 측정기로 실시간 관찰하였다. 관찰 데이터로부터 솔더의 크랙 진전 중과 크랙 진전 완료 시점의 고장 메커니즘을 제시하였다. 제시된 고장 메커니즘을 유한요소법으로 검증하여 솔더의 크랙이 진전 중에는 저온조건에서 크랙이 열리고 저항이 증가하며, 크랙의 진전이 완료된 후에는 고온조건에서 크랙이 열리고 저항이 증가하는 조건으로 바뀜을 보였다. 이런 결과에 기반하여 온도 사이클에서 저항측정을 통해 칩저항 실장 솔더의 고장예지가 가능함을 제시하였다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 춘계 기술심포지움 논문집
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• pp.138-141
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• 2002

There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in $\mu$BGA packages is studied in this paper.