• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.38-47
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• 2023

Three dimensional (3D) packaging is a next-generation packaging technology that vertically stacks chips such as memory devices. The necessity of 3D packaging is driven by the increasing demand for smaller, high-performance electronic devices (HPC, AI, HBM). Also, it facilitates innovative applications across another fields. With growing demand for high-performance devices, companies of semiconductor fields are trying advanced packaging techniques, including 2.5D and 3D packaging, MR-MUF, and hybrid bonding. These techniques are essential for achieving higher chip integration, but challenges in mass production and fine-pitch bump connectivity persist. Advanced bonding technologies are important for advancing the semiconductor industry. In this review, it was described 3D packaging technologies for chip integration including mass reflow, thermal compression bonding, laser assisted bonding, hybrid bonding.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 1999.12a
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• pp.155-162
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• 1999

A bare chip packaging technology by an encapsulated flip chip bonding on a build-up printed circuit board has emerged in 1991. Since then, it enabled a high density and low cost semiconductor packaging such as a direct chip bonding on mother board and high density surface mount components, such as BGA and CSP. This technology can respond to various requirements from applications and is considered to take over a main role of semiconductor packaging in the next decade.

• Journal of the Semiconductor & Display Technology
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• v.21 no.1
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• pp.62-66
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• 2022

Semiconductor is one of the most internationally competitive areas among domestic industries, the major concern of which is the stability of the wafer manufacturing processes. The packaging process is the final step in wafer manufacturing. Problems in the wafer packaging process cause large losses. The vibrations are supposed to be the most important factors for the packaging quality. In this study, the structure of a packaging box was analyzed through experiments and computer simulations, and further the effects of design alterations to suppress the vibrations have been investigated. The final result shows that the vibrations can be reduced substantially to improve the stability of the structure.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.09a
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• pp.123-139
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• 2002

• Electronics and Telecommunications Trends
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• v.35 no.4
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• pp.1-10
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• 2020

Since the 1960s, semiconductor packaging technology has developed into electrical joining techniques using lead frames or C4 bumps using tin-lead solder compositions based on traditional reflow processes. To meet the demands of a highly integrated semiconductor device, high reliability, high productivity, and an eco-friendly simplified process, packaging technology was required to use new materials and processes such as lead-free solder, epoxy-based non cleaning interconnection material, and laser based high-speed processes. For next generation semiconductor packaging, the study status of two epoxy-based interconnection materials such as fluxing and hybrid underfills along with a laser-assisted bonding process were introduced for fine pitch semiconductor applications. The fluxing underfill is a solvent-free and non-washing epoxy-based material, which combines the underfill role and fluxing function of the Surface Mounting Technology (SMT) process. The hybrid underfill is a mixture of the above fluxing underfill and lead-free solder powder. For low-heat-resistant substrate applications such as polyethylene terephthalate (PET) and high productivity, laser-assisted bonding technology is introduced with two epoxy-based underfill materials. Fluxing and hybrid underfills as next-generation semiconductor packaging materials along with laser-assisted bonding as a new process are expected to play an active role in next-generation large displays and Augmented Reality (AR) and Virtual Reality (VR) markets.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.5
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• pp.350-354
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• 2020

In this study, a pressure sensor for each displacement was fabricated based on the silicon-based pressure sensor obtained through simulation results. Wires were bonded to the pressure sensor, and a piezoresistive pressure sensor was inserted into the printed circuit board (PCB) base by directly connecting a micro-electro-mechanical system (MEMS) sensor and a readout integrated circuit (ROIC) for signal processing. In addition, to prevent exposure, a non-conductive liquid silicone was injected into the sensor and the entire ROIC using a pipette. The packaging proceeded to block from the outside. Performing such packaging, comparing simple contact with strong contact, and confirming that the measured pulse wavelength appears accurately.

• Journal of the Semiconductor & Display Technology
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• v.19 no.2
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• pp.105-109
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• 2020

Today's placement machines can pick and place thousands of components per hour with a very high degree of accuracy. The packaged semiconductor chips are inserted into a carrier at regular intervals, covered with a tape to protect the chips from external impact, and supplied in a roll form. These packaging processes also progress rapidly in a consistent direction, affecting the peelback strength between the cover tape and carrier depending on the main process conditions. In this paper, we analyzed the main process variables that affect peelback strength in the reel tape packaging process for packaging semiconductor chips. The main effects and interactions were analyzed. The peelback strength range required in the packaging process was set as the nominal the best characteristics, and the optimum process condition satisfying this was derived.

• Journal of the Semiconductor & Display Technology
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• v.18 no.4
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• pp.149-153
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• 2019

The technology of electronic packaging among semiconductor technologies is evolving as an axis of the market in its own field beyond the simple assembly process of the past. In the field of electronic packaging technology, the packaging of power modules plays an important role for green electric vehicles. In this power module packaging, the thermal reliability is an important factor, and silicon nitride plays an important part of package substrates, Silicon nitride is a compound that is not found in nature and is made by chemical reaction between silicon and nitrogen. In this study, this core material, silicon nitride, was fabricated by reaction bonded silicon nitride. The fabricated silicon nitride was studied for thermo-mechanical properties, and through this, the structure of power module packaging was made using reaction bonded silicon nitride. And the characteristics of stress were evaluated using finite element analysis conditions. Through this, it was confirmed that reaction bonded silicon nitride could replace the silicon nitride as a package substrate.

• Electronics and Telecommunications Trends
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• v.39 no.3
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• pp.1-12
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• 2024

As the demand for high-performance semiconductors, such as chips for artificial intelligence and high-bandwidth memory devices, increases along with the limitations of ultrafine processing technology in the semiconductor in-line process, advanced packaging becomes an increasingly important breakthrough technology for further improving semiconductor performance. Major countries, including Korea, the United States, Taiwan, and China, and large companies are strengthening their technological industry capabilities through the development of advanced packaging technology and policy support. Nevertheless, Korea has a lower level of development of related technologies by approximately 66% compared with the most advanced countries. Therefore, we aim to discover the needs for an advanced packaging research and development (R&D) policy through written expert interviews and importance satisfaction analysis. As a result, various implications for R&D policy directions are suggested to strengthen the technological capabilities and R&D ecosystem of the Korean advanced packaging technology.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 1999.11a
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• pp.13-21
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• 1999