• 제목/요약/키워드: semiconductor equipment

검색결과 866건 처리시간 0.022초

Fabrication of Nanopatterns by Using Diblock Copolymer

  • KANG GIL BUM;KIM SEONa-IL;KIM YONG TAE;KIM YOUNG HHAN;PARK MIN CHUL;KIM SANG JIN;LEE CHANG WOO
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2005년도 추계 학술대회
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    • pp.183-187
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    • 2005
  • Thin films of diblock copolymers may be suitable for semiconductor device applications since they enable patterning of ordered domains with dimensions below photolithographic resolution over wafer-scale area. We obtained nanometer-scale cylindrical structure of dibock copolymer of polystyrene-block-poly(methylmethacrylate), PS-b-PMMA, also demonstrate pattern transfer of the nanoporous polymer using both reactive ion etching. The size of fabricated naonoholes were about 10 nm. Fabricated nanopattern surface was observed by field emission scanning electron microscope (FESEM).

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반도체장비유지보수 자격개발에 관한 연구 (A Study on the Development of Qualification for Semiconductor Machine Maintenance)

  • 강석주
    • 한국산학기술학회논문지
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    • 제13권6호
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    • pp.2472-2478
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    • 2012
  • 본 연구는 반도체 산업에서 반도체장비 유지보수에 사용되어지는 반도체장비 유지보수 분야의 전문기술인력을 효과적으로 양성할 수 있는 반도체장비 유지보수의 자격종목을 개발하고자 하는데 그 목적이 있다. 연구의 목적을 달성하기 위하여 반도체장비 유지보수 분야의 국내외 실태 조사, 문헌조사를 통하여 반도체장비 유지보수 관련 교육훈련기관 및 검정 수요 예상 인력을 파악했으며, 유사자격제도(전자부품장착기능사, 전자부품장착산업기사, 생산자동화기능사, 생산자동화산업기사)를 분석하였고, 직무분석을 통하여 반도체장비유지보수기능사의 직무 및 교육내용을 분석하였다. 또한 반도체장비 유지보수 자격종목 신설에 대한 설문조사를 실시했으며, 반도체장비유지보수기능사 자격종목의 출제기준 및 채점 방법을 제시했고, 필기시험과 실기시험에 대한 모의 검정시험도 실시하였다. 이러한 결과를 토대로 반도체장비유지보수기능사에 대한 교육프로그램을 만들었으며, 자격검정을 실시할 수 있는 출제기준을 제시하였다.

Understanding of RF Impedance Matching System Using VI-Probe

  • Lee, Ji Ha;Park, Hyun Keun;Lee, Jungsoo;Hong, Snag Jeen
    • 반도체디스플레이기술학회지
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    • 제19권3호
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    • pp.43-48
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    • 2020
  • The demand for stable plasma has been on the rise because of the increased delivery power amount in the chamber for improving productivity, and fast and accurate plasma impedance matching become a crucial performance measure for radio frequency (RF) power system in semiconductor manufacturing equipment. In this paper, the overall impedance matching was understood, and voltage and current values were extracted with voltage - current (VI) probe to measure plasma impedance in real-time. Actual matching data were analyzed to derive calibration coefficient for V and I measurements to understand the characteristics of VI probe, and we demonstrated the tendency of RF impedance matching according to changes in load impedance. This preliminary empirical research can contribute to fast RF matching as well as advanced equipment control for the next level of detailed investigation on embedded system based-RF matching controller.

반도체 확산공정에서의 컨베이어 적정속도와 길이를 구하는 시뮬레이션 (Conveyor Capability Simulation for Semiconductor Diffusion Area)

  • 박일석;이칠기
    • 한국시뮬레이션학회논문지
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    • 제11권3호
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    • pp.59-65
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    • 2002
  • Semiconductor wafer fabrication is a business of high capital investment and fast changing nature. To be competitive, the production in a fab needs to be effectively planned and scheduled starting from the ramping up phase, so that the business goals such as on-time delivery, high output volume and effective use of capital intensive equipment can be achieved. Project executed that use conveyor in bay semiconductor A line. But conveyor capability is lacking and rundown happened in equipment. Do design without normal simulation and conveyor system failed. The comparison is peformed through simulation using .AutoMod a window 98 based discrete system simulation software, as a tool for comparing performance of proposed layouts. In this research estimate optimum conveyor capability, there is the purpose.

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검출력 향상된 자기상관 공정용 관리도의 강건 설계 : 반도체 공정설비 센서데이터 응용 (Power Enhanced Design of Robust Control Charts for Autocorrelated Processes : Application on Sensor Data in Semiconductor Manufacturing)

  • 이현철
    • 산업경영시스템학회지
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    • 제34권4호
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    • pp.57-65
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    • 2011
  • Monitoring auto correlated processes is prevalent in recent manufacturing environments. As a proactive control for manufacturing processes is emphasized especially in the semiconductor industry, it is natural to monitor real-time status of equipment through sensor rather than resultant output status of the processes. Equipment's sensor data show various forms of correlation features. Among them, considerable amount of sensor data, statistically autocorrelated, is well represented by Box-Jenkins autoregressive moving average (ARMA) model. In this paper, we present a design method of statistical process control (SPC) used for monitoring processes represented by the ARMA model. The proposed method shows benefits in the power of detecting process changes, and considers robustness to ARMA modeling errors simultaneously. We prove benefits through Monte carlo simulation-based investigations.

구매자-공급자 관계가 공급자 혁신에 미치는 영향에 대한 탐색적 연구 : 반도체 장비 산업 사례를 중심으로 (An Exploratory Study of the Effect of Buyer-supplier Relationship on Supplier's Innovation : Cases from Semiconductor Equipment Industry)

  • 이강문;조동성;이윤철
    • 지식경영연구
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    • 제10권4호
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    • pp.163-183
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    • 2009
  • Numerous studies in the field of buyer-supplier relationship research have focused on the buyer's performance. In contrast, supplier's performance has been paid relatively little attention by researchers, especially the research about the supplier's innovation in the relationship is still in its early stage. In this paper, we examine the relation between the attribute of buyer-supplier relationship and the attribute of supplier's innovation through case research. We define the attribute of buyer-supplier relationship as 'tie strength' (Granovetter, 1973), and the attribute of supplier's innovation as 'exploitation or exploration' (March, 1991). We selected the semiconductor equipment industry of U.S.A, Japan and Korea and firm (JUSUNG Engineering) as cases that examine the relation. We found that a strong tie relationship is positively associated with supplier's exploitation based innovation, and a weak tie relationship is positively related to it's exploration based innovation in this research also. In addition, we could verify reduction of strong tie relationship cause supplier's organizational change.

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스퍼터 장비의 설계 룰을 찾기 위한 Si박막 특성 변화 연구 (A Study on the Change of Si Thin Film Characteristics to Find Design Rules for Sputtering Equipment)

  • 김보영;강서익
    • 반도체디스플레이기술학회지
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    • 제19권3호
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    • pp.100-105
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    • 2020
  • Recently, as display and semiconductor devices have been miniaturized and highly integrated, there is a demand for optimization of the structural characteristics of the thin film accordingly. The sputtering device has the advantage of stably obtaining a desired thin film depending on the material selected for the target. However, due to the structural characteristics of the sputtering equipment, the structural characteristics of the film may be different depending on the incidence angle of the sputtering target material to the substrate. In this study, the characteristics of the thin film material according to the scattering angle of the target material and the incidence position of the substrate were studied to find the optimization design rule of the sputtering equipment. To this end, a Si thin film of 1 ㎛ or less was deposited on the Si(100) substrate, and then the microstructure, reflectance, surface roughness, and thin film crystallinity of the thin film formed for each substrate location were investigated. As a result of the study, it was found that as the sputter scattering angle increased and the substrate incident angle decreased, the gap energy along with the surface structure of the thin film increased from 1.47 eV to 1.63 eV, gradually changing to a non-conductive tendency.

반도체 웨이퍼 세정 장비 모니터링 시스템을 위한 기본 요소의 분석 및 설계 (Design and Analysis of the Basic Components for the Semiconductor Wafer Cleaning Equipment Monitoring System)

  • 강호석;임성락
    • 한국정보처리학회논문지
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    • 제7권1호
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    • pp.115-125
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    • 2000
  • 본 논문에서는 반도체 웨이퍼 세정 장비를 위한 모니터링 시스템의 기본 요소와 이를 기반으로 모니터링 시스템 모델을 제시한다. 기본 요소는 모니터링 시스템에서 요구되는 필수적인 기능으로써 제어 시스템과의 통신, 사용자 인터페이스, 원격 감시 시스템과의 통신, 감시 데이터 관리, 테스크간 통신으로 구성된다. 기본 요소들의 기능과 기본 요소들 간의 관계를 정의하여 독립된 테스크로 설계한다. 제시한 모델의 타당성을 평가하기 위하여 Windows NT에서 Visual C++를 사용하여 기본 요소들을 구현하여 반도체 웨이퍼 세정 장비의 모니터링 시스템에 적용해 보았다.

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반도체 Sub-Fab 용 웨지 마운트 레벨러(Wdge Mount Leveler)의 마찰과 응력에 관한 연구 (A study on friction and stress analysis of wedge mount leveler in Semi-Conductor Sub-Fab)

  • 민경호;송기혁;홍광표
    • Design & Manufacturing
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    • 제11권2호
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    • pp.25-28
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    • 2017
  • Semiconductor equipment manufacturers desire to enhance efficiency of Sub Fab to increase semiconductor productivity. For this reason, Sub Fab equipment manufacturers are developing Integrated System that combined modules with multiple facilities. Integrated System is required to apply Mount Leveler of Wedge Type in compliance with weight increase compared with existing single equipment and product shape change. This thesis analyzes main design variables of components of Wedge Mount Leveler and carries out structure analysis using ANSYS, finite element analysis program Analysis shows that main design variables of components of Wedge Mount Leveler has self-locking condition by friction force of Wedge and adjusting bolt. Each friction force hinges upon Wedge angle and Friction Coefficient of contact surface and upon the thread angle and Friction Coefficient of contact surface. Also, as a result of carrying out structure analysis of Wedge Mount Leveler, deflection and stress appears in different depending on the height of the level.

FAB-Wide 스케줄링을 통한 반도체 연구라인의 운용 최적화 (The Operational Optimization of Semiconductor Research and Development Fabs by FAB-wide Scheduling)

  • 김영호;이지형;선동석
    • 전기학회논문지
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    • 제57권4호
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    • pp.692-699
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    • 2008
  • Semiconductor research and development(R&D) fabs are very different than production fabs in many ways such as the scales of production, job priority, production methods, and performance measures. Efficient operations of R&D fabs are very important to the development of new product, process stability, high yield, and ultimately company competitiveness. This paper proposes the fab-wide scheduling method for operational optimization of the R&D fabs. Most scheduling systems of semiconductor fabs have only focused on maximizing throughput of each separated areas without considering WIP(works in process) flows of entire fab. In this paper, we proposes the a fab-wide scheduling system which schedules all lots to entire fab equipment at once. We develop the MIP(mixed integer programing) model which allocates the lots to production equipment considering many constraints of all processes and the CP(constraint programming) model which determines the sequences of the lots in the production equipment. The proposed FAB-wide scheduling model is applied to the newly constructed R&D fab. As a result, we have accomplished the system based automated job reservation, decrease of the hot lot delay, increase of the queue time satisfaction, the high throughput by maximizing the batch sizes, decrease of the WIP TAT(Turn Around Time).