• 대한전자공학회논문지SD
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• 제48권5호
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• pp.18-24
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• 2011

DEM(Dynamic Element Matching) 기법중의 하나인 DWA(Data Weighted Averaging)는 멀티비트 Sigma-Delta Modulator에서 피드백 DAC의 단위요소 커패시터 부정합으로 인한 비선형성을 제거하기 위하여 널리 이용된다. 본 논문에서는 기존 DWA 구조에서 적용된 클록 타이밍을 조정하여 양자화기 데이터 코드 출력을 Latch 하는 $2^n$ Register 블록을 $2^n$ S-R latch 블록으로 대체하여 MOS Tr.를 줄임과 더불어 여분의 클록을 제거하였고, n-bit 데이터 코드를 지연시키기 위해 사용되는 2개의 n-비트 Register 블록을 1개의 n-비트 Register 블록으로 감소시켰다. 개선된 DWA 구조를 이용하여 3차 3-비트 SC(Switched Capacitor) Sigma-Delta Modulator를 설계한 후, 입력 주파수 20kHz, 샘플링 주파수 2.56MHz에서 0.1% DAC 단위 요소 커패시터 부정합을 갖도록 하여 시뮬레이션 한 결과 기존의 구조와 동일한 해상도를 얻을 수 있었고, 222개의 MOS Tr. 수를 줄일 수 있었다.

• 한국해양공학회지
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• 제28권4호
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• pp.294-305
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• 2014

In offshore structures, fire is one of the most important hazardous events. The concern of fires has recently been reflected in the rules and quantified risk assessment based design practice. Within the framework of quantified risk assessment and the management of offshore installations, therefore, more refined computations of the consequences or hazardous action effects due to fire are required. To mitigate fire risk, passive fire protection(PFP) is widely used on offshore structures. This study presents methods for a nonlinear structural response analysis considering the PFP effects under fires. It is found that a structural response analysis is most likely to use valuable technology for the optimization and design of offshore structures with PFP. Thermal and structural response analyses have been performed using LS-DYNA and FAHTS/USFOS. The results of these structural response analyses are compared with each other.

• 정보처리학회논문지A
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• 제18A권6호
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• pp.265-270
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• 2011

다양한 영역에서32비트 명령어 기반 마이크로프로세서의 사용이 일반화되고 있지만, 임베디드 시스템 환경에서는 여전히 16비트 명령어 기반 프로세서가 널리 사용되고 있다. 인텔 8086, 80286 및 모토로라 68000, 그리고 에이디칩스의 AE32000과 같은 프로세서들이 그 대표적인 예이다. 그러나, 16비트 명령어들은 32비트 명령어보다 그 크기로 인해 상대적으로 낮은 표현력을 가지고 있어 동일한 기능을 구현하는데 32비트 명령어 기반 프로세서에 비해 많은 명령어를 수행해야 한다는 문제점을 가지고 있다. 실행 명령어 수는 프로세서의 실행 성능과 밀접한 관련을 가지므로 16비트 명령어셋의 표현력을 향상시켜 성능 저하 문제를 해결할 필요성이 있다. 본 논문에서는 기존의 그래프 컬러링 기반 레지스터 할당(Graph-coloring based Register Allocation) 알고리즘을 보완한 페어 레지스터 할당(Pair Register Allocation) 알고리즘을 제안하고, 이를 통한 성능 분석 결과 및 추후 연구 방향을 제시하고자 한다.

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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• pp.102-106
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• 1999

We have designed and fabricated a four-bit shift register circuit using YBCO bicrystal junctions and experimentally tested its operations by a computer-controlled digital measurement set-up. Laser ablated YBCO thin films with clean surface were used in this work. The circuit consists of the shift register and two read SQUIDs placed next to each sides of the shift register. The SQUIDs were inductively coupled to the nearby shift register stages. A probe equipped with high speed coax lines were used in this experiment. The major obstacle in testing the circuit was the interference between the read SQUIDs and we solved the problem by finding the correct operation points of the SQUIDs from the simultaneously measured modulation curves. Loaded Data("1" or "0") were successfully shifted from a stage to the next one by a controlled current pulse injected to the bias lines located between the stages and the data shifts were correctly monitored by the read SQUIDs

• 한국CDE학회논문집
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• 제21권2호
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• pp.186-195
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• 2016

The finite element modeling of a ship for hull structural analysis on the basis of new harmonized common structural rules (CSR-H) is to be extended to the cargo holds in fore and after body of a ship. Unlike the parallel middle-body where the external and internal features of hull are equal along to the longitudinal direction of a ship, in fore and after body, the external and internal features of hull vary linearly or even irregularly in forms of a surface or a curve along to the longitudinal direction of a ship. Thus, it needs lots of design man-hours for the modeling for structural analysis. In order to save man-hours in initial structural design phase of a ship, the specified 3D CAD system has been adopted in shipbuilding industry. Through the interface between CAD and CAE (rule scantling and direct strength assessment), design man-hour in initial design phase can be saved even under the environment of CSR-H.

• 정보처리학회논문지A
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• 제8A권2호
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• pp.107-116
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• 2001

A multithreaded model is a hybrid one which combines locality of execution of the von Neumann model with asynchronous data availability and implicit parallelism of the dataflow model. Much researches that have been made toward the advanced performance of multithreaded models are about the cache memory which have been proved to be efficient in the von Neumann model. To use an instruction cache or operand cache, the multithreaded models must have cache memories. If cache memories are added to the multithreaded model, they may have the disadvantage of high implementation cost in the mode. To solve these problems, we did not add cache memory but applied the method of executing the caching by using available registers of the multithreaded models. The available register-based caching method is one that use the registers which are not used on the execution of threads. It may accomplish the same effect as the cache memory. The multithreaded models can compute the number of available registers to be used during the process of the register optimization, and therefore this method can be easily applied on the models. By applying this method, we can also remove the access conflict and the bottleneck of frame memories. When we applied the proposed available register-based caching method, we found that there was an improved performance of the multithreaded model. Also, when the available-register-based caching method is compared with the cache based caching method, we found that there was the almost same execution overhead.

• 환경영향평가
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• 제18권5호
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• pp.281-291
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• 2009

In Total Water Pollutant Load Management System of Korea, unit load approach based on land register data is currently used for the estimation of non-point pollutant load. However, a problem raised that land register data could not always reflect the actual land surface coverages which determine runoff characteristics of non-point pollution sources. As a way to overcome this, we tried to establish quantitative relationships between the aerial images (0.4m resolution) which reflect actual land surface coverages and the land registration maps according to the 19 major designated land-use categories in Kyeongan watershed. Analyses showed different relationships according to the land-use categories. Only a few land-use categories including forestry, road and river showed essentially identical and some categories such as orchard, parking lot and sport utility site showed no relationships at all between image data and land register data. Except for the two cases, all the other categories showed statistically significant linear relationships between image data and land register data. The analyses indicate that using high resolution aerial maps is a better way to estimate non-point pollutant load. If the aerial maps are not available, application of the linear relationships as conversion factors of land register data to image data could be an possible option to estimate non-point pollutant loads for the specific land-use categories in Kyeongan watershed.

• 대한전자공학회논문지SD
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• 제47권8호
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• pp.47-55
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• 2010

본 논문에서는 고해상도 저전력 SAR 타입 ADC(아날로그 디지털 변환기)의 면적을 획기적으로 줄이기 위해서 역 다중화기 (Demultiplexer)와 카운터 (Counter)를 이용하는 타이밍 레지스터 (Timing register) 구조를 제안하였다. 전통적으로 사용되는 쉬프트 레지스터에 기반을 둔 타이밍 레지스터 구조는 해상도가 증가될수록 면적이 급격하게 증가하고, 또한 잡음의 원인이 되는 디지털 소비 전력도 증가되는 반면, 제안하는 구조는 해상도 증가에 따른 에러 보정 회로의 면적과 소비 전력 증가를 줄일 수 있다. 0.18 um CMOS 공정을 이용하여 제작하였으며, 제안한 타이밍 레지스터 구조를 이용하여, 기존 구조 대비 5.4배의 면적 감소와 디지털 전력 최소화의 효과를 얻을 수 있었다. 설계한 12 비트 SAR ADC는 11 비트의 유효 비트 (ENOB), 2 mW (기준전압 생성 블록 포함)의 소비전력과 1 MSPS의 변환 속도를 보였으며, 레이아웃 면적은 $1mm{\times}1mm$ 이었다.

• 한국통신학회논문지
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• 제17권11호
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• pp.1219-1227
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• 1992

VXIbus란 모듈화 기기들의 상호 호환성을 위하여 VMEbus를 기본으로 구성된 업계 표준이다. VXIbus 시스템을 구현하기 위한 디바이스는 크게 register based 디바이스와 message based 디바이스로 나눌 수 있으며, 본 논문에서는 slot0모듈과 A/D변환 모듈로 이루어진 register based VXIbus 서브 시스템을 구성하였다. A/D변환모듈은 디지털 전압계로 사용되었으며, 외부 제어컴퓨터와 slot0모듈간의 통신은 LAN을 이용하였다. 한편 SCPI(Standard Commands for Programmable Instruments)는 계측기 언어의 표준화로서 외부 제어 컴퓨터에서 ASCII 형태로 slot0 모듈로 전송되어지며, 다시 2진 형태의 명령어로 변환되어 A/D변환모듈로 전송되어진다. 실험결과 측정된 전압값이 외부 제어 컴퓨터상에서 그래픽 사용자 인터페이스를 통해 관찰할 수 있도록 시스템을 구성하였다.

• 대한조선학회논문집
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• 제51권4호
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• pp.283-290
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• 2014

Environmental changes, especially global climate change, are creating new routes to reduce a shipping service distance in Arctic area. The Arctic routes are shorter than 60% of existing ways Panama or Suez canal). For this reason, ship owners prefer to navigate in Arctic area and a transportation of goods though the Arctic area is increasing. But the low temperature in Arctic condition changes the material properties. Especially, the material will be brittle and strength will increase. And an ultimate strength analysis of ship stiffened panels is changed depending on temperatures. In present study, the ultimate strength analysis of stiffened panels in double hull oil tankers is performed under various low temperatures with the material properties obtained by tensile coupon test. The analytical method as named ALPS/ULSAP was used for analysis method and 6 kinds of temperature (20, 0, -20, -40, -60 and $-80^{\circ}C$) were considered to investigate the effect of Arctic conditions.