• Title/Summary/Keyword: redundancy sub-module

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Switching Frequency Reduction Method for Modular Multi-level Converter Utilizing Redundancy Sub-module (예비 서브모듈을 활용한 모듈형 멀티레벨 컨버터의 스위칭 주파수 저감 기법)

  • Lee, Yoon-Seok;Yoo, Seung-Hwan;Choi, Jong-Yun;Park, Yong-Hee;Han, Byung-Moon;Yoon, Young-Doo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.12
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    • pp.1640-1648
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    • 2014
  • This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.

Redundancy Module Operation Analysis of MMC using Scaled Hardware Model (축소모형을 이용한 MMC의 Redundancy Module 동작분석)

  • Yoo, Seung-Hwan;Shin, Eun-Suk;Choi, Jong-Yun;Han, Byung-Moon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.8
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    • pp.1046-1054
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    • 2014
  • In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability. The developed hardware prototype can be utilized for analyzing the basic operation and performance improvement of MMC according to the modulation and redundancy operation scheme. It also can be utilize to analyze the basic operational characteristics of HVDC system based on MMC.

Life-cycle estimation of HVDC full-bridge sub-module considering operational condition and redundancy (HVDC 풀-브리지 서브모듈의 동작 조건과 여유율을 고려한 수명예측)

  • Kang, Feel-soon;Song, Sung-Geun
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1208-1217
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    • 2019
  • The life-cycle prediction of the sub-module which is the unit system of MMC is very important from the viewpoint of maintenance and economic feasibility of HVDC system. However, the life-cycle prediction that considers only the type, number and combination of parts is a generalized result that does not take into account the operating condition of the sub-module, and may significantly differ from the life-cycle of the actual one. Therefore, we design a fault tree for the purpose of reflecting the operation characteristics of the full-bridge sub-module and apply the MIL-HDBK-217F to the failure rate of the basic event to predict the life-cycle of the full-bridge sub-module. It compares the life-cycle expectancy of the conventional failure rate analysis with the proposed fault-tree analysis and compares the lifetime according to whether the redundancy of the full-bridge sub-module is considered.

Redundancy Module Operation Analysis of MMC using Scaled Hardware Model (축소모형을 이용한 MMC의 Redundancy Module 동작 분석)

  • yoo, Seung-Hwan;Jeong, Jong-Kyou;Hong, Jung-Won;Han, Byung-Moon
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.209-210
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    • 2014
  • In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability.

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Optimization of Redundancy Allocation in Multi Level System under Target Availability (목표가용도를 고려한 다계층 시스템의 최적 중복 설계)

  • Chung, Il-Han
    • Journal of Korean Society for Quality Management
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    • v.41 no.3
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    • pp.413-421
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    • 2013
  • Purpose: System availability and life cycle cost are often used to evaluate the system performance and is influenced by the operation and maintenance characteristic. In this paper, we propose the method to improve life cycle cost and satisfy the target availability through redundancy allocation. Methods: We consider the redundancy is available at all items in multi level system. Thus, we assume that sub-assembly, module, components can be duplicated. Simulation and genetic algorithm are employed to optimize redundancy allocation. Results: Target availability is higher, the life cycle cost is increased. In addition, the items for redundancy are selected at higher level in multi level system if target availability is higher. Conclusion: We could know that target availability affects the duplication number of items and the selection of redundancy items. For further study, we will consider new optimization algorithms to compare with the proposed GA algorithm and improve optimization performance.

Switching-level operation Anlysis Model development of 11-level MMC HVDC System using PSCAD/EMTDC (PSCAD/EMTDC를 이용한 11-level MMC HVDC 시스템의 스위칭레벨 동작분석 모델 개발)

  • Hong, Jung-Won;Jeong, Jong-Kyou;Yoo, Seung-Hwan;Han, Byung-Moon;Choi, Jong-Yun
    • Proceedings of the KIPE Conference
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    • 2013.07a
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    • pp.540-541
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    • 2013
  • 본 논문에서는 PSCAD/EMTDC를 이용하여 MMC(Modular Multi-level Converter)를 기반으로 한 HVDC 시스템 시뮬레이션 모델을 개발하였다. 스위칭 레벨의 동작을 분석하기 위해 각 ARM당 10개의 SM(Sub-Module)과 2개의 RM(Redundancy-Module)을 구성하여 11-level의 MMC 출력 전압을 형성하였다. SM 동작시 발생하는 전압 불균등 문제를 해결하기 위하여 밸런싱 알고리즘을 적용하였으며, SM의 출력 전압에 발생하는 Ripple을 고려하여 Capacitor의 용량을 설계하고 이를 검증하였다. 또한 시뮬레이션을 이용하여 HVDC 성능 분석과 MMC의 성능개선을 위한 순환전류 알고리즘 및 Redundancy 투입 알고리즘을 구현하고 그 결과를 확인하였다.

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A New Scheme for Nearest Level Control with Average Switching Frequency Reduction for Modular Multilevel Converters

  • Park, Yong-Hee;Kim, Do-Hyun;Kim, Jae-Hyuk;Han, Byung-Moon
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.522-531
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    • 2016
  • This paper proposes a new NLC (Nearest Level Control) scheme for MMCs (Modular Multilevel Converters), which offers voltage ripple reductions in the DC capacitor of the SM (Sub-Module), the output voltage harmonics, and the switching losses. The feasibility of the proposed NLC was verified through computer simulations. Based on these simulation results, a hardware prototype of a 10kVA, DC-1000V MMC was manufactured in the lab. Experiments were conducted to verify the feasibility of the proposed NLC in an actual hardware environment. The experimental results were consistent with the results obtained from the computer simulations.

Fault-tree based reliability analysis for paralleled half-bridge sub-module of HVDC (HVDC 병렬 하프브리지 서브모듈에 대한 고장나무기반의 신뢰성 분석)

  • Kang, Feel-soon;Song, Sung-Geun
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1218-1223
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    • 2019
  • In HVDC systems, the full-bridge submodule increases the number of components compared to the half-bridge submodule, but the failure-rate can be reduced by securing 100 % redundancy. However, full-bridge submodules require more complex control algorithms to ensure the redundancy and to prevent arm-short with sufficient dead-time. To solve this problem, we analyse the failure-rate of the paralleled half-bridge configuration with the same number of components and 100 % redundancy as the full-bridge submodule. The fault tree analysis (FTA) method is applied to the conventional part failure analysis to reflect the operation risk of the submodule, thereby predicting the life-cycle of the submodule more accurately. To verify the validity, the failure-rate results of the proposed FTA based analysis method are compared with the failure rate obtained by the part failure method.

Switching-Level Operation Analysis of MMC-based Back-to-Back Converter for HVDC Application (HVDC 적용을 위한 MMC 기반 Back-to-Back 컨버터의 스위칭레벨 동작분석)

  • Hong, Jung-Won;Jeong, Jong-Kyou;Yoo, Seong-Hwan;Choi, Jong-Yun;Han, Byung-Moon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.9
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    • pp.1240-1248
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    • 2013
  • This paper describes a switching-level operation analysis of BTB(Back-To-Back) converter for HVDC(high voltage DC) application based on MMC(modular multi-level converter). A switching-level operation analysis for BTB converter is very important to understand the converter operation in detail and check the voltage and current transients in each components. However, the development of switching-level simulation model for the actual size BTB Converter is very difficult because the MMC normally has more than 150 sub-modules for each arm. So, a switching level simulation model for the 11-level MMC-based BTB converter was developed with PSCAD/EMTDC software, which has 12 sub-modules for the positive arm and another 12 sub-modules for the negative arm. The DC-voltage balance algorithm, the circulating-current reduction algorithm, the harmonic reduction algorithm, and the redundancy operation algorithm were included in this simulation model. The developed simulation model can be utilized to analyze the MMC-based BTB converter for HVDC application in switching level and to develop the protection scheme for the MMC-based BTB converter for HVDC application.

Switching Frequency Reduction Method for Modular Multi-level Converter utilizing Redundancy Sub-module (예비 서브모듈을 활용한 모듈형 멀티레벨 컨버터의 스위칭 주파수 저감 기법)

  • yoo, Seung-Hwan;Jeong, Jong-Kyou;Han, Byung-Moon
    • Proceedings of the KIPE Conference
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    • 2014.11a
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    • pp.11-12
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    • 2014
  • This paper introduces a scaled hardware model for the 10kVA, 1kV, 11-level MMC (Modular Multilevel Converter), which was manufactured in the lab based on computer simulations with PSCAD/EMTDC. Various experiments were conducted to verify the major operation algorithms of MMC. The hardware scaled-model developed in the lab can be utilized for analyzing the operation analysis and performance evaluation of MMC according to the modulation pattern and redundancy operation scheme.

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