• 전기학회논문지
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• 제63권12호
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• pp.1640-1648
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• 2014

This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.

• 전기학회논문지
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• 제63권8호
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• pp.1046-1054
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability. The developed hardware prototype can be utilized for analyzing the basic operation and performance improvement of MMC according to the modulation and redundancy operation scheme. It also can be utilize to analyze the basic operational characteristics of HVDC system based on MMC.

• 전기전자학회논문지
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• 제23권4호
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• pp.1208-1217
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• 2019

풀-브리지 서브모듈은 MMC의 단위 시스템으로서 서브모듈에 대한 수명예측은 HVDC 시스템의 유지 보수와 경제성 확보 관점에서 매우 중요하다. 그러나 일반적으로 부품의 종류, 개수, 결합 상태만을 고려하는 수명 예측은 대상 시스템의 구동상태를 고려하지 않는 일반화 된 결과로 실제 시스템의 수명과 크게 차이가 발생할 수 있다. 따라서 본 논문에서는 풀-브리지 서브모듈의 동작 특성을 반영하기 위한 목적으로 고장나무를 설계하고 기본 사상의 고장률에 MIL-HDBK-217F를 적용하여 풀-브리지 서브모듈의 수명을 예측한다. 기존의 부품고장률 분석과 제안된 고장나무 분석에 의한 기대 수명을 비교하고, 풀-브리지 서브모듈의 여유율 적용 여부에 따른 수명을 비교한다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 전력전자학술대회 논문집
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• pp.209-210
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability.

• 품질경영학회지
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• 제41권3호
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• pp.413-421
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• 2013

Purpose: System availability and life cycle cost are often used to evaluate the system performance and is influenced by the operation and maintenance characteristic. In this paper, we propose the method to improve life cycle cost and satisfy the target availability through redundancy allocation. Methods: We consider the redundancy is available at all items in multi level system. Thus, we assume that sub-assembly, module, components can be duplicated. Simulation and genetic algorithm are employed to optimize redundancy allocation. Results: Target availability is higher, the life cycle cost is increased. In addition, the items for redundancy are selected at higher level in multi level system if target availability is higher. Conclusion: We could know that target availability affects the duplication number of items and the selection of redundancy items. For further study, we will consider new optimization algorithms to compare with the proposed GA algorithm and improve optimization performance.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2013년도 전력전자학술대회 논문집
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• pp.540-541
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• 2013

본 논문에서는 PSCAD/EMTDC를 이용하여 MMC(Modular Multi-level Converter)를 기반으로 한 HVDC 시스템 시뮬레이션 모델을 개발하였다. 스위칭 레벨의 동작을 분석하기 위해 각 ARM당 10개의 SM(Sub-Module)과 2개의 RM(Redundancy-Module)을 구성하여 11-level의 MMC 출력 전압을 형성하였다. SM 동작시 발생하는 전압 불균등 문제를 해결하기 위하여 밸런싱 알고리즘을 적용하였으며, SM의 출력 전압에 발생하는 Ripple을 고려하여 Capacitor의 용량을 설계하고 이를 검증하였다. 또한 시뮬레이션을 이용하여 HVDC 성능 분석과 MMC의 성능개선을 위한 순환전류 알고리즘 및 Redundancy 투입 알고리즘을 구현하고 그 결과를 확인하였다.

• Journal of Power Electronics
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• 제16권2호
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• pp.522-531
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• 2016

This paper proposes a new NLC (Nearest Level Control) scheme for MMCs (Modular Multilevel Converters), which offers voltage ripple reductions in the DC capacitor of the SM (Sub-Module), the output voltage harmonics, and the switching losses. The feasibility of the proposed NLC was verified through computer simulations. Based on these simulation results, a hardware prototype of a 10kVA, DC-1000V MMC was manufactured in the lab. Experiments were conducted to verify the feasibility of the proposed NLC in an actual hardware environment. The experimental results were consistent with the results obtained from the computer simulations.

• 전기전자학회논문지
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• 제23권4호
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• pp.1218-1223
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• 2019

HVDC 시스템에서 풀-브리지 서브 모듈 구조는 하프브리지 서브 모듈에 비해 부품 수가 증가하지만 100 % 여유율 확보가 가능하여 고장률을 크게 줄일 수 있다. 그러나 풀-브리지 서브 모듈은 여유율 보장과 암(arm) 단락 방지를 위한 데드 타임(dead-time)을 확보하기 위해 복잡한 제어 알고리즘이 필요하다. 이 문제를 해결하기 위해 풀-브리지 서브 모듈과 동일한 부품 수와 100 % 여유율을 갖는 병렬 하프브리지 구성의 고장률을 분석한다. 기존의 부품 고장 분석에 고장나무분석 방법을 적용하여 서브 모듈의 동작 위험을 반영함으로써 서브 모듈의 수명주기를 보다 정확하게 예측할 수 있다. 병렬 하프브리지 서브모듈의 타당성 검증을 위해 FTA 기반 분석 방법과 기존의 PCA 기반 방법으로 분석된 고장률을 비교한다.

• 전기학회논문지
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• 제62권9호
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• pp.1240-1248
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• 2013

This paper describes a switching-level operation analysis of BTB(Back-To-Back) converter for HVDC(high voltage DC) application based on MMC(modular multi-level converter). A switching-level operation analysis for BTB converter is very important to understand the converter operation in detail and check the voltage and current transients in each components. However, the development of switching-level simulation model for the actual size BTB Converter is very difficult because the MMC normally has more than 150 sub-modules for each arm. So, a switching level simulation model for the 11-level MMC-based BTB converter was developed with PSCAD/EMTDC software, which has 12 sub-modules for the positive arm and another 12 sub-modules for the negative arm. The DC-voltage balance algorithm, the circulating-current reduction algorithm, the harmonic reduction algorithm, and the redundancy operation algorithm were included in this simulation model. The developed simulation model can be utilized to analyze the MMC-based BTB converter for HVDC application in switching level and to develop the protection scheme for the MMC-based BTB converter for HVDC application.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 추계학술대회 논문집
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• pp.11-12
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• 2014

This paper introduces a scaled hardware model for the 10kVA, 1kV, 11-level MMC (Modular Multilevel Converter), which was manufactured in the lab based on computer simulations with PSCAD/EMTDC. Various experiments were conducted to verify the major operation algorithms of MMC. The hardware scaled-model developed in the lab can be utilized for analyzing the operation analysis and performance evaluation of MMC according to the modulation pattern and redundancy operation scheme.