• Journal of IKEEE
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• v.21 no.2
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• pp.130-135
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• 2017

Normally, in data transmission, extra parity bits are added to the input message which were derived from its input and a pre-defined algorithm. The same algorithm is used by the receiver to check the consistency of the delivered information, to determine if it is corrupted or not. It recovers and compares the received information, to provide matching and correcting the corrupted transmitted bits if there is any. This paper aims the following objectives: to use an alternative error detection-correction method, to lessens both the fixed number of the required redundancy bits 'r' in cyclic redundancy checking (CRC) because of the required polynomial generator and the overhead of interspersing the r in Hamming code. The experimental results were synthesized using Xilinx Virtex-5 FPGA and showed a significant increase in both the transmission rate and detection of random errors. Moreover, this proposal can be a better option for detecting and correcting errors.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.12
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• pp.1022-1032
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• 2002

A multibit DRAM BIST methodology reducing redundancy programming overhead has been proposed. It is capable of counting and locating faulty bits simultaneously with the test. If DRAM cells are composed of n blocks generally, the proposed BIST can detect the state of no error, the location of faulty bit block if there is one error and the existence of errors in more than two blocks, which are n + 2 states totally, with only n comparators and an 3 state encoder. Based on the proposed BIST methodology, the testing scheme which can detect the number and locations of faulty bits with the errors in two or more blocks, can be easily implemented. Based on performance evaluation, the test and redundancy programming time of 64MEG DRAM with 8 blocks is reduced by 1/750 times with 0.115% circuit overhead.

• KIPS Transactions on Computer and Communication Systems
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• v.4 no.9
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• pp.321-326
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• 2015

In this paper, we proposed an algorithm which could transmit reliable data between smart devices by using inaudible high frequency of audible frequency range and cyclic redundancy check method. The proposed method uses 18 kHz~22 kHz as high frequency which inner speaker of smart device can make a sound in audible frequency range (20 Hz~22 kHz). To increase transmission quantity of data, we send mixed various frequencies at high frequency range 1 (18.0 kHz~21.2 kHz). At the same time, to increase accuracy of transmission data, we send some mixed frequencies at high frequency range 2 (21.2 kHz~22.0 kHz) as checksum. We did experiments about data transmission between smart devices by using the proposed method to confirm data transmission speed and accuracy of the proposed method. From the experiments, we showed that the proposed method could transmit 32 bits data in 235 ms, the transmission success rate was 99.47%, and error detection by using cyclic redundancy check was 0.53%. Therefore, the proposed method will be a useful for wireless transmission technology between smart devices.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.6
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• pp.625-630
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• 2014

Asynchronous digital circuits working in military and space environments are often subject to the adverse effects of radiation faults. In this paper, we propose a new hardening technique against radiation faults. The considered digital system has the structure of DMR (Double Modular Redundancy), in which two sub-systems conduct the same work simultaneously. Based on the output feedback, the proposed scheme diagnoses occurrences of radiation faults and realizes immediate recovery to the normal behavior by overriding parts of memory bits of the faulty sub-system. As a case study, the proposed control scheme is applied to an asynchronous dual ring counter implemented in VHDL code.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.4
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• pp.97-105
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• 1994

Transform image coding using DCT is proved to be efficient in the absence of channel error but its performance degrades rapidly over noisy channel. In this paper, in the case of appling bit selcetive error correction coding that protects some significant bits in a codeword, an efficient allocation method of imformation bits and additive redundancy bits used for quantization and error correction coding respectively under constant transmission bit rate is proposed, and its performance is analyzed. As a result, without increasing trasmission bit rate, PSNR can be improved up to 7~8 [dB] below bit error rate $10^2$ and the image without blocking effect caused by bit error resulted from channel noise can be recostructed.

• Journal of the Korea Society of Computer and Information
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• v.5 no.4
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• pp.90-95
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• 2000

In order to enhance the confidence in the mobile communication and improve the performance of the bit error, we have been using coding method. In the case of this, we have to add redundancy bits by using error correcting codes such as the block or convolutional codes. However, the result of redundancy bits causes to improve confidence. but to drop the efficiency in the bandwidth. We have studied coding method that we are able to get the good coding gain without any changes in the data transmission rates in the limited bandwidth. In this Paper, we design TCM(Trellis Coded Modulation) which was proposed by Ungerboeck and MTCM(Multiple TCM), with multiplicity(k＝2), which was proposed by Divsalar, using the optimum encoder. As state number is varied in the optimum encoder, we compare the performance of the TCM and MTCM by using Monte Carlo simulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.9 no.3
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• pp.103-107
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• 1984

According to rapid developments in data communication, we have being used every infromation with ease. In receiving and transmitting the infromation acquired, it is being needed to transmit it with minimizing bits if possible. Therefore this paper suggests the efficient coding system, that is, OCM(Octal-Compact Mapping) technique. In case of average-case, it has 3.5bytes in entropy with 8 symbols. This means it is compressed more than at least 1 byte as compared with another coding techniques. It decreases the redundancy of data and is superior to another data compression techniques.

• Proceedings of the KSR Conference
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• 2004.10a
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• pp.1235-1240
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• 2004

This paper has presented the parallel cyclic redundancy check (CRC) technique that performs CRC computation in parallel superior to the conventional CRC technique that processes data bits serially. Also, it has showed that the implemented parallel CRC circuit had been successfully applied to the inductively coupled passive RFID system working at a frequency of 13.56MHz in order to process the detection of logical faults more fast and the system had been verified experimentally. In comparison with previous works, the proposed RFID system using the parallel CRC technique has been shown to reduce the latency and increase the data processing rates in the results. Therefore, it seems reasonable to conclude that the parallel CRC realization in the RFID system offers a means of maintaining the integrity of data in the high speed RFID system.

• Journal of the Korea Institute of Military Science and Technology
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• v.17 no.3
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• pp.336-341
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• 2014

When using a higher-order modulation scheme, there are variations in bit-reliability depending on the bit position in a modulation symbol. Variations of bit-reliability in the codeword block lower the decoding performance. Also, the decoding performance increases as the sum of the bit-reliabilities in the codeword block increases. This paper presents a novel hybrid automatic repeat request scheme that increases the sum of the reliabilities of the transmitted bits by lowering the modulation order, and decreases the variations of bit-reliability in the codeword block by preferentially retransmitting bits with low reliability. The proposed scheme outperforms the constellation rearrangement scheme. Furthermore, the proposed scheme also provides a good solution in cases where the size of the retransmission block is smaller than the size of the initial transmission block.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.7A
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• pp.994-1004
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• 2000

In this paper, bitstreams are composed of using H.263 for a moving picture coding in the band-limited and error-prone environment such as wireless environment. EREC sub-frames are implemented by applying the proposed EREC algorithm in order to be UEP for the real data parts of implemented bitstreams. Because those are able to do resynchronization with a block unit, propagation of the error can be minimized, and the position of the important bits such as INTRADC and MVD can be known. Class is separated using the position of these important bits, and variable puncturing tables are designed by the class informations and the code rates of turbo codes are differently designed in according to the class. Channel coding used the turbo codes, and an interleaver to be designed in the turbo codes does not eliminate redundancy bits of the important bits in applying variable code rates of EREC sub-frames unit and is always the same at the transmitter and the receiver although being variable frame size. As a result of simulation, UEP with the code rate similar to EEP is obtained a improved result in the side of bit error probability. And the result of applying it to image knows that the subjective and objective quality have been improved by the protection of important bits.