• 제목/요약/키워드: quantizer design

검색결과 79건 처리시간 0.024초

Low Complexity Vector Quantizer Design for LSP Parameters

  • Woo, Hong-Chae
    • The Journal of the Acoustical Society of Korea
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    • 제17권3E호
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    • pp.53-57
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    • 1998
  • Spectral information at a speech coder should be quantized with sufficient accuracy to keep perceptually transparent output speech. Spectral information at a low bit rate speech coder is usually transformed into corresponding line spectrum pair parameters and is often quantized with a vector quantization algorithm. As the vector quantization algorithm generally has high complexity in the optimal code vector searching routine, the complexity reduction in that routine is investigated using the ordering property of the line spectrum pair. When the proposed complexity reduction algorithm is applied to the well-known split vector quantization algorithm, the 46% complexity reduction is achieved in the distortion measure compu-tation.

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학습시간을 개선한 Fuzzy c-means 알고리즘 (The Enhancement of Learning Time in Fuzzy c-means algorithm)

  • 김형철;조제황
    • 융합신호처리학회 학술대회논문집
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    • 한국신호처리시스템학회 2001년도 하계 학술대회 논문집(KISPS SUMMER CONFERENCE 2001
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    • pp.113-116
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    • 2001
  • The conventional K-means algorithm is widely used in vector quantizer design and clustering analysis. Recently modified K-means algorithm has been proposed where the codevector updating step is as fallows: new codevector = current codevector + scale factor (new centroid - current codevector). This algorithm uses a fixed value for the scale factor. In this paper, we propose a new algorithm for the enhancement of learning time in fuzzy c-means a1gorithm. Experimental results show that the proposed method produces codebooks about 5 to 6 times faster than the conventional K-means algorithm with almost the same Performance.

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Computer에 의한 인체측정에 관한 연구 (A Study on the Athromet Using Digital Computers)

  • 이근부
    • 산업경영시스템학회지
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    • 제6권8호
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    • pp.21-26
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    • 1983
  • It is necessary to measure all the size and contours of the human figures to design all the materials for the human natures. So this study is provided to develop new method on the measurements of human contour (Athromet) using image Process techniques which would be more simple and accurate then the other known methods. T.V. cameras, quantizer, micro computer and printer are utilized to this study. The author had acknowledged that this process provides the accurate and speedy results from the vast majority of data compare to the formerly developed methods.

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에지 강조 정보를 이용한 오차확산 해프토닝 (The Error Diffusion halftoning Method Using Information of Edge Enhancement)

  • 곽내정;안재형
    • 대한전자공학회논문지SP
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    • 제42권3호
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    • pp.107-114
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    • 2005
  • 선으로 구성된 회로도나 설계도 같은 특수 목적 영상을 처리할 경우 에지가 강조된 영상을 필요로 한다. 또한 프린터, 팩시밀리, LCD TV 등과 같은 이진 출력 장치에 연속 계조 영상을 표현하기 위한 디지털 해프토닝 방법 중 오차 확산 방법으로 이진 영상을 생성할 경우 에지가 흐려진다. 본 논문은 회로도나 설계도 등의 영상 뿐 아니라 이진 출력 장치 등에 사용되는 이진 영상의 에지를 강조하는 방법을 제안한다. 인간의 눈은 한 화소의 명암값이 아니라 국부 평균을 인식한다는 것을 이용하여 제안 방법은 원화소의 명암값과 $3{\times}3$ 블록의 평균 명암값과의 차이 값에 공간적 위치 값에 따른 가중치를 결합하여 국부 공간 변화량(LAM: local activity measure)을 사용한다. 제안된 시스템은 또한 LAM에 평균 명암도를 곱하여 얻어진 에지 강조 정보량(IEE: information of edge enhancement)을 사용한다. IEE를 양자화기 입력에 더하여 이진 영상의 에지를 강조한다. 컴퓨터 시뮬레이션은 제안 방법이 기존의 방법에 비해 영상의 에지가 강조되어 시각적으로 선명한 영상을 생성한다. 또한 거리에 따른 에지 상관도와 로컬 평균 일치도를 이용하여 제안 방법과 기존 방법의 특성을 분석한다.

고속 DWA의 동작시간을 개선한 1.2V $3^{rd}$ 4bit 시그마 델타 변조기 설계 (The Design of 1.2V $3^{rd}$ Order 4bit Sigma Delta Modulator with Improved Operating Time of High Speed DWA)

  • 이순재;김선홍;조성익
    • 전기학회논문지
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    • 제57권6호
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    • pp.1081-1086
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    • 2008
  • This paper presents the $3^{rd}$ 4bit sigma delta modulator with the block and timing diagrams of DWA(Data Weighted Averaging) to optimize a operating time. In the modulator, the proposed DWA structure has a stable operation and timing margin so as to remove three latches and another clock. Because the modulator with proposed DWA structure improve timing margin about 23%. It can increase sampling frequency up to 244MHz. Through the MATLAB modeling, the optimized coefficients are obtained to design the modulator. The fully differential SC integrators, DAC, switch, quantizer, and DWA are designed by considering the nonideal characteristics. The designed $3^{rd}$ order 4bit modulator has a power consumption of 40mW and SNR(signal to noise ratio) of 77.2dB under 1.2V supply and 64MHz sampling frequency.

압축이득을 이용한 최적 웨이브렛 필터의 설계 (Optimal Wavelet Filter Design Using Coding Gain)

  • 이임건
    • 한국멀티미디어학회논문지
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    • 제6권7호
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    • pp.1159-1168
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    • 2003
  • 본 논문에서는 압축 효율을 최적화 하는 웨이브렛 필터의 설계 알고리즘을 제안하였다. 제안한 알고리즘은 고정 양자화기를 이용하는 영상 부호화 응용에서 압축 방법에 상관없이 웨이브렛 변환 영역에서 각 대역의 에너지를 가장 불균등하게 압축하는 필터를 설계함으로써 전체적인 부호화 효율을 높일 수 있도록 하였다. 직교와 쌍직교 필터에서의 목적함수는 웨이브렛 변환 계층에 맞도록 확장시켜 각 계층별로 최적 필터 계수를 얻었으며 최적화 과정의 제한조건을 완화하여 압축이득을 최대화시킬 수 있도록 하였다. 제안한 방법으로 설계한 필터는 실험 결과 기존의 필터와 비교하여 에너지 압축이득이 향상되었음을 알 수 있었다.

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Distributed Estimation Using Non-regular Quantized Data

  • Kim, Yoon Hak
    • Journal of information and communication convergence engineering
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    • 제15권1호
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    • pp.7-13
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    • 2017
  • We consider a distributed estimation where many nodes remotely placed at known locations collect the measurements of the parameter of interest, quantize these measurements, and transmit the quantized data to a fusion node; this fusion node performs the parameter estimation. Noting that quantizers at nodes should operate in a non-regular framework where multiple codewords or quantization partitions can be mapped from a single measurement to improve the system performance, we propose a low-weight estimation algorithm that finds the most feasible combination of codewords. This combination is found by computing the weighted sum of the possible combinations whose weights are obtained by counting their occurrence in a learning process. Otherwise, tremendous complexity will be inevitable due to multiple codewords or partitions interpreted from non-regular quantized data. We conduct extensive experiments to demonstrate that the proposed algorithm provides a statistically significant performance gain with low complexity as compared to typical estimation techniques.

Cluster-Based Quantization and Estimation for Distributed Systems

  • Kim, Yoon Hak
    • Journal of information and communication convergence engineering
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    • 제14권4호
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    • pp.215-221
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    • 2016
  • We consider a design of a combined quantizer and estimator for distributed systems wherein each node quantizes its measurement without any communication among the nodes and transmits it to a fusion node for estimation. Noting that the quantization partitions minimizing the estimation error are not independently encoded at nodes, we focus on the parameter regions created by the partitions and propose a cluster-based quantization algorithm that iteratively finds a given number of clusters of parameter regions with each region being closer to the corresponding codeword than to the other codewords. We introduce a new metric to determine the distance between codewords and parameter regions. We also discuss that the fusion node can perform an efficient estimation by finding the intersection of the clusters sent from the nodes. We demonstrate through experiments that the proposed design achieves a significant performance gain with a low complexity as compared to the previous designs.

2차 멀티비트 Sigma-Delta 변조기 설계 및 제작 (Design and Fabrication of Second-Order Multibit Sigma-Delta Modulator)

  • 김선홍;최석우;조성익;김동용
    • 대한전기학회논문지:시스템및제어부문D
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    • 제53권9호
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    • pp.650-656
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    • 2004
  • This paper presents block and timing diagrams of the DWA(data weighted averaging) to optimize a feedback time delay of the sigma-delta modulator. Through the Matlab modeling, the optimized coefficients of the integrators are obtained to design the modulator. And then the fully differential SC integrators, feedback DAC, 9-level quantizer, and DWA are designed by considering the nonideal characteristics of the modulator. The designed second-order multibit modulator is fabricated in a 0.35$\mu\textrm{m}$ CMOS process. The designed modulator achieves 73dB signal-to-noise ratio and 72dB dynamic range at 1.2Vp-p 585kHz input singal and 52.8MHz sampling frequency.

12-bit 파이프라인 BiCMOS를 사용한 A/D 변환기의 설계 (The Design of Analog-to-Digital Converter using 12-bit Pipeline BiCMOS)

  • 김현호;이천희
    • 한국시뮬레이션학회논문지
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    • 제11권2호
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    • pp.17-29
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    • 2002
  • There is an increasing interest in high-performance A/D(Analog-to-Digital) converters for use in integrated analog and digital mixed processing systems. Pipeline A/D converter architectures coupled with BiCMOS process technology have the potential for realizing monolithic high-speed and high-accuracy A/D converters. In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. Test/simulation results of the circuit blocks and the converter system are presented. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer. Measured value is DNL=${\pm}$0.30LSB, INL=${\pm}$0.52LSB, SNR=66dBFS and SFDR=74dBc at Fin=24.5MHz. Also Fabricated on 0.8um BiCMOS process.

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