• The Journal of the Acoustical Society of Korea
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• v.17 no.3E
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• pp.53-57
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• 1998

Spectral information at a speech coder should be quantized with sufficient accuracy to keep perceptually transparent output speech. Spectral information at a low bit rate speech coder is usually transformed into corresponding line spectrum pair parameters and is often quantized with a vector quantization algorithm. As the vector quantization algorithm generally has high complexity in the optimal code vector searching routine, the complexity reduction in that routine is investigated using the ordering property of the line spectrum pair. When the proposed complexity reduction algorithm is applied to the well-known split vector quantization algorithm, the 46% complexity reduction is achieved in the distortion measure compu-tation.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2001.06a
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• pp.113-116
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• 2001

The conventional K-means algorithm is widely used in vector quantizer design and clustering analysis. Recently modified K-means algorithm has been proposed where the codevector updating step is as fallows: new codevector = current codevector + scale factor (new centroid - current codevector). This algorithm uses a fixed value for the scale factor. In this paper, we propose a new algorithm for the enhancement of learning time in fuzzy c-means a1gorithm. Experimental results show that the proposed method produces codebooks about 5 to 6 times faster than the conventional K-means algorithm with almost the same Performance.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.6 no.8
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• pp.21-26
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• 1983

It is necessary to measure all the size and contours of the human figures to design all the materials for the human natures. So this study is provided to develop new method on the measurements of human contour (Athromet) using image Process techniques which would be more simple and accurate then the other known methods. T.V. cameras, quantizer, micro computer and printer are utilized to this study. The author had acknowledged that this process provides the accurate and speedy results from the vast majority of data compare to the formerly developed methods.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.3 s.303
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• pp.107-114
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• 2005

Edge enhanced image is needed for processing images for special purpose such as a circuit diagram or a design composed of lines. Error diffusion halftoning, among digital halftoning methods to represent a continuous grayscale image for the binary output device such as printers, facsimiles, LCD televisions and etc. also makes edges of objects blurred. This paper proposes the method to enhance the edge of a binary image for the binary output device as well as a circuit diagram or a design. Based on that the human eyes perceive the local average luminance rather than the pixel's luminance itself, the proposed system uses a local activitymeasure (LAM), which is the difference between a pixel luminance and the average of its $3{\times}3$ neighborhood pixels' luminances weighted according to the spatial positioning. The system also usesinformation of edge enhancement(IEE), which is computed from the LAM multiplied by the average luminance. The IEE is added to the quantizer's input pixel and feeds into the halftoning quantizer. The quantizer produces the halftone image having the enhanced edge. The simulation results show that the proposed method produces more fine halftoning images than conventional methods due to the enhanced edges. Also the performance of the proposed method is compared with that of the conventional method by measuring the edge correlation and the local average accordance over a range of viewing distances.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.6
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• pp.1081-1086
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• 2008

This paper presents the $3^{rd}$ 4bit sigma delta modulator with the block and timing diagrams of DWA(Data Weighted Averaging) to optimize a operating time. In the modulator, the proposed DWA structure has a stable operation and timing margin so as to remove three latches and another clock. Because the modulator with proposed DWA structure improve timing margin about 23%. It can increase sampling frequency up to 244MHz. Through the MATLAB modeling, the optimized coefficients are obtained to design the modulator. The fully differential SC integrators, DAC, switch, quantizer, and DWA are designed by considering the nonideal characteristics. The designed $3^{rd}$ order 4bit modulator has a power consumption of 40mW and SNR(signal to noise ratio) of 77.2dB under 1.2V supply and 64MHz sampling frequency.

• Journal of Korea Multimedia Society
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• v.6 no.7
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• pp.1159-1168
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• 2003

In this paper, a new wavelet filter design algorithm is proposed which optimizes energy compaction of transformed coefficients. The filter, designed by the proposed algorithm enhances the coding gain of the system with fixed quantizer by most unevenly distributed energy in transform domain. The coding gain function was extended to obtain the optimal filter coefficients in each stage. The experiments showed that the filter designed by proposed method outperforms conventional filters in energy compaction rate.

• Journal of information and communication convergence engineering
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• v.15 no.1
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• pp.7-13
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• 2017

We consider a distributed estimation where many nodes remotely placed at known locations collect the measurements of the parameter of interest, quantize these measurements, and transmit the quantized data to a fusion node; this fusion node performs the parameter estimation. Noting that quantizers at nodes should operate in a non-regular framework where multiple codewords or quantization partitions can be mapped from a single measurement to improve the system performance, we propose a low-weight estimation algorithm that finds the most feasible combination of codewords. This combination is found by computing the weighted sum of the possible combinations whose weights are obtained by counting their occurrence in a learning process. Otherwise, tremendous complexity will be inevitable due to multiple codewords or partitions interpreted from non-regular quantized data. We conduct extensive experiments to demonstrate that the proposed algorithm provides a statistically significant performance gain with low complexity as compared to typical estimation techniques.

• Journal of information and communication convergence engineering
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• v.14 no.4
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• pp.215-221
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• 2016

We consider a design of a combined quantizer and estimator for distributed systems wherein each node quantizes its measurement without any communication among the nodes and transmits it to a fusion node for estimation. Noting that the quantization partitions minimizing the estimation error are not independently encoded at nodes, we focus on the parameter regions created by the partitions and propose a cluster-based quantization algorithm that iteratively finds a given number of clusters of parameter regions with each region being closer to the corresponding codeword than to the other codewords. We introduce a new metric to determine the distance between codewords and parameter regions. We also discuss that the fusion node can perform an efficient estimation by finding the intersection of the clusters sent from the nodes. We demonstrate through experiments that the proposed design achieves a significant performance gain with a low complexity as compared to the previous designs.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.9
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• pp.650-656
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• 2004

This paper presents block and timing diagrams of the DWA(data weighted averaging) to optimize a feedback time delay of the sigma-delta modulator. Through the Matlab modeling, the optimized coefficients of the integrators are obtained to design the modulator. And then the fully differential SC integrators, feedback DAC, 9-level quantizer, and DWA are designed by considering the nonideal characteristics of the modulator. The designed second-order multibit modulator is fabricated in a 0.35$\mu\textrm{m}$ CMOS process. The designed modulator achieves 73dB signal-to-noise ratio and 72dB dynamic range at 1.2Vp-p 585kHz input singal and 52.8MHz sampling frequency.

• Journal of the Korea Society for Simulation
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• v.11 no.2
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• pp.17-29
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• 2002

There is an increasing interest in high-performance A/D(Analog-to-Digital) converters for use in integrated analog and digital mixed processing systems. Pipeline A/D converter architectures coupled with BiCMOS process technology have the potential for realizing monolithic high-speed and high-accuracy A/D converters. In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. Test/simulation results of the circuit blocks and the converter system are presented. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer. Measured value is DNL=${\pm}$0.30LSB, INL=${\pm}$0.52LSB, SNR=66dBFS and SFDR=74dBc at Fin=24.5MHz. Also Fabricated on 0.8um BiCMOS process.