• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.3
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• pp.1700-1706
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• 2014

In this paper, a step down converter for LED backlight of mobile application has been proposed. The converter which is operated with 4 MHz high switching frequency is capable of reducing mounting area of passive devices consists of a power stage and a control block. Circuit elements of the power stage are inductor, output capacitor, MOS transistors and feedback resistors. The control block consists of pulse width modulator, error amplifier and oscillator etc. Proposed step down converter has been designed and verified using a $0.35{\mu}m$ 1-poly 4-metal BCD process technology. Simulation results show that the output voltage is 1.8 V in 3.7 V input voltage, output current 100 mA which is larger than 25 ~ 50 mA in conventional 500 KHz driven converter when the duty ratio is 0.4.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.4
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• pp.333-342
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• 2009

Three-level Diode Clamped Multilevel Inverter, generally known as Neutral-Point-Clamped (NPC) Inverter, has an inherent problem causing Neutral Point (NP) potential variation. Until now, in many literatures NP potential problem has been investigated and lots of solutions have also been proposed. However, under fault and fault tolerant control, distinctive feature for NP potential variation problem was rarely published from the standpoint of reliability. In this paper, NP potential is analytically investigated both normal and faulty conditions under carrier based PWM. Subsequently, relation between fault detection time and size of capacitor is analyzed. This information is explored by simulation and experiment results, which contribute to enhance the reliability of inverter system.

• Journal of Power Electronics
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• v.18 no.3
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• pp.702-713
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• 2018

Power loss reduction and total harmonic distortion(THD) minimization are two important goals of improving three-level inverters. In this paper, an optimized pulse width modulation (PWM) strategy that can reduce switching losses and balance the neutral point with an optional THD of three-level neutral-point-clamped inverters is proposed. An analysis of the two-level discontinuous PWM (DPWM) strategy indicates that the optimal goal of the proposed PWM strategy is to reduce switching losses to a minimum without increasing the THD compared to that of traditional SVPWMs. Thus, the analysis of the two-level DPWM strategy is introduced. Through the rational allocation of the zero vector, only two-phase switching devices are active in each sector, and their switching losses can be reduced by one-third compared with those of traditional PWM strategies. A detailed analysis of the impact of small vectors, which correspond to different zero vectors, on the neutral-point potential is conducted, and a hysteresis control method is proposed to balance the neutral point. This method is simple, does not judge the direction of midpoint currents, and can adjust the switching times of devices and the fluctuation of the neutral-point potential by changing the hysteresis loop width. Simulation and experimental results prove the effectiveness and feasibility of the proposed strategy.

• Journal of the Korean Society for Precision Engineering
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• v.27 no.10
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• pp.29-33
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• 2010

UV laser micromachining of metallic materials has been used in microelectronic and other industries. This paper shows on experimental investigation of micromachining of copper using a 355nm UV laser with 50ns pulse duration. A finite element model with high strain rate effect is especially suggested to investigate the phenomena which are only dominated by mechanically pressure impact in disregard of thermally heat transfer. In order to consider the strain rate effect, Cowper-Symonds model was used. To analyze the dynamic deformation during a very short processing time, which is nearly about several tens nanoseconds, a commercial Finite Element Analysis (FEA) code, LS-DYNA 3D, was employed for the computational simulation of the UV laser micro machining behavior for thin copper material. From these computational results, depth of the dent (from one to six pulsed) were observed and compared with previous experimental results. This will help us to understand interaction between UV laser beam and material.

• Journal of Broadcast Engineering
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• v.13 no.5
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• pp.612-621
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• 2008

Due to the various constraints such as feasible size of data payload and low transmission power, no technical specifications on the voice communication are included in the Zigbee standard. In this paper, a voice coding technique for application to the IEEE 802.15.4 standard, which is the basis of Zigbee communication, is presented. Here, both high compression and good waveform recovery are essential. To meet those requirements, a multi-stage discrete wavelet transform (DWT) block and a binary coding block consisting of two different pulse-code modulations are exploited. Theoretical analysis and simulation results in an indoor wireless channel show that the voice coder with 2-stage DWT is most appropriate from the viewpoint of compression and waveform recovery. When the line-of-sight component is dominant, the voice coding scheme has good recovery capability even in the moderate signal-to-noise power ratios. Hence, it is considered that the presented scheme will be a technical reference for the future recommendation of voice communication exploiting Zigbee.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.6
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• pp.33-41
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• 2014

In this paper, we propose a D flip-flop based on quantum-dot cellular automata(QCA) clocking and design a programmable quantum-dot cell(QPCA) structure using the proposed D flip-flop. Previous D flip-flops on QCA are that input should be set to an arbitrary value, and wasted output values exist because it was utilized to duplicate by clock pulse and QCA clocking. In order to eliminate these defects, we propose a D flip-flop structure using binary wire and clocking technique on QCA. QPCA structure consists of wire control logic, rule control logic, D flip-flop and XOR logic gate. In experiment, we perform the simulation of QPCA structure using QCADesigner. As the result, we confirm the efficiency of the proposed structure.

• Journal of the Korean Society for Geothermal and Hydrothermal Energy
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• v.13 no.1
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• pp.1-6
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• 2017

In this paper, the flow characteristics of water in the water supply pipes of a WBC array were evaluated. We simulated the flow velocities and pressures for a standard pipe, an expansion pipe with a concentric reducer, and an expansion pipe with an eccentric reducer using computational fluid dynamics. In the case of the standard pipe, when the inlet flow velocities were 0.5 m/s and 2.0 m/s, the maximum flow velocities at the center of the WBC array were 0.54 m/s and 2.74 m/s, respectively, which were the greatest values among those of all the pipe models considered. In the case of the expansion pipe, the maximum flow velocities at the center of the WBC array were almost the same under the same conditions regardless of the type of reducer. The pressure losses in the pipe due to the concentric and eccentric reducers were found to be (165.09 ${\times}$ inlet $velocity^{1.6677}$) and (210.98 ${\times}$ inlet $velocity^{1.6478}$), respectively. The coefficient of determination at this time was greater than 0.99 and was the same for both the models. As a simulation result, it was found that in order to reduce the pressure loss when pipe with WBC array is connected with a conventional pipe, diameter of the pipe with WBC array at that section should be enlarged by one step, and then connected to the conventional pipe with a concentric reducer.

• Korean Journal of Materials Research
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• v.9 no.10
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• pp.1032-1036
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• 1999

The electron emission and degradation of the ferroelectric Pb($\textrm{Zr}_{0.5}\textrm{Ti}_{0.5}$)$\textrm{O}_3$ ceramics by the pulse electric field have been investigated as a function of the upper electrode diameter. Polarization increased with the decrease of the upper electrode diameter due to the increase of the volume fraction participated in the polarization reversal near the electrode edge. Simulation using ANSYS 5.3 for the electric field distribution showed that the electric field increased near the upper electrode edge of the asymmetric electrode structure. The ferroelectric volume near the upper electrode edge which contributed to the increase of the polarization and the emission charge per electrode diameter were independent on the upper electrode diameter. Polarization and dielectric constant were decreased due to the erosion of the upper electrode with repeating the emission cycles, but they were recovered by the electrode regeneration. The degradation of the ferroelectric surface resulted in the increase of the coercive field and dielectric loss.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.8
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• pp.1-11
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• 2002

A multi-section DFB-LD shows optical bistability subject to externally injected light signal, then it has potential applications such as wavelength conversion and optical logic gates. In this paper, we have studied the optical bistability in multi-section DFB-LD using split-step time-domain model. It is confirmed that the multi-section DFB-LD, which is excited inhomogeneously, shows bistability. The optical bistable characteristics are investigated when input light is injected into a absorptive region. Simulation results show that multi-section DFB-LD works as a flip-flop depending on the set-reset optical pulse which has a few ns in switching time and a few pj in switching energy, so that it can act as a optical logic device. Besides, if we change the carrier lifetime and the differential gain coefficient, it is expected that the response time of optical output signal can be reduced.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.4
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• pp.80-85
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• 2011

A time-pickoff circuit used for time measurement suffers from a timing error due to the dependence of the generation time of a timing pulse on the size of the input signal, i.e., time walk. In this study, a time-pickoff method, which employs an automatic gain control (AGC) circuit, is proposed for reducing the timing error. The AGC circuit is added to the input of the comparator, and it renders the sizes of input signals of the comparator relatively uniform. The performance of the proposed time-pickoff method is analyzed using the SPICE simulation, and experiments are performed to confirm the analytical results. The measured time walk is reduced to 2.000 ns by 65% for input signals with a dynamic range of 20 dB as compared to a typical leading-edge discriminator.