• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.9
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• pp.53-60
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• 1997

In this paper, an efficient BILBO(named EBILBO) is proposed for batch testing application when a BIST (built-in self test) circuit is implemented on ASIC. In a large and complex circuit, the proposed algorithm of batch testing has one pin-count that can easily control 4 test modes in the normal speed of circuit operation. For the implementation of the BIST cifcuit, the test patern needed is generated by PRTPG(pseudo-random test pattern generator) and the ouput is observed by proposed algorithm is easily modified, such as the modelling of test pattern genration, signature EBILBO area and performance of the implemented BIST are evaluated using ISCAS89 benchmark circuits. As a resutl, in a circuit above 600 gates, it is confirmed that test patterns are genrated flexibly about 500K as EBILBO area is 59%, and the range of fault coverage is from 88.3% to 100%. And the optimized operation frequency of EBILBO designed and the area are 50MHz and 150K respectively. On the BIST circit of the proposed batch testing, the test mode of EBILBO is able to execute as realtime that has te number of s$\^$+/n$\^$+/(2s/2p-1) clocks simultaneously with the normal mode of circuit operation. Also the proposed algorithm is made of the library with VHDL coding thus, it will be widely applied to DFT (design for testability) that satisfies the design and test field.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.12
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• pp.4588-4603
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• 2014

In this paper, we present a high-quality image authentication scheme based on absolute moment block truncation coding. In the proposed scheme, we use the parity of the bitmap (BM) to generate the authentication code for each compressed image block. Data hiding is used to authenticate whether the content has been altered or not. For image authentication, we embed the authentication code to quantization levels of each image block compressed by absolute moment block truncation coding (AMBTC) which will be altered when the host image is manipulated. The embedding position is generated by a pseudo-random number generator for security concerned. Besides, to improve the detection ability we use a hierarchical structure to ensure the accuracy of tamper localization. A watermarked image can be precisely inspected whether it has been tampered intentionally or incautiously by checking the extracted watermark. Experimental results demonstrated that the proposed scheme achieved high-quality embedded images and good detection accuracy, with stable performance and high expansibility. Performance comparisons with other block-based data hiding schemes are provided to demonstrate the superiority of the proposed scheme.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.6
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• pp.1105-1112
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• 2020

One-dimensional 3-neighborhood Cellular Automata (CA)-based pseudo-random number generators are widely applied in generating test patterns to evaluate system performance and generating key sequence generators in cryptographic systems. In this paper, in order to design a CA-based key sequence generator that can generate more complex and confusing sequences, we study a one-dimensional symmetric 5-neighborhood CA that expands to five neighbors affecting the state transition of each cell. In particular, we propose an n-cell one-dimensional symmetric 5-neighborhood CA synthesis algorithm using the algebraic method that uses the Krylov matrix and the one-dimensional 90/150 CA synthesis algorithm proposed by Cho et al. [6].

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.11
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• pp.581-588
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• 2007

In Digital Right Management, symmetric cipher is used for content encryption to reduce encryption cost, AES, advanced encryption standard is usually used to multimedia encryption under desktop environment because of its reasonable security level and computation cost. But mobile handheld device often uses slow speed processor and operates under battery-powered environment. Therefore it requires low computation cost and low energy consumption. This paper proposes new stream cipher scheme which combines pseudo random number generator(PRNG) and dynamically generated permutations. Proposed scheme activates PRNG and generates original key streams. Then it generates extended key streams by applying permutation to original sequence. These extended key streams are XORed with plaintext and generate ciphertext. Proposed scheme reduces the usage of PRNG. Therefore this scheme is fast and consumes less energy in comparison with normal stream cipher. Especially, this scheme shows great speed up (almost 2 times) than normal stream cipher scheme in random access.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.25 no.3
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• pp.501-507
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• 2015

The online banking service handles a banking business over the internet, it is necessary to ensure that all financial transactions are processed securely. So, there are various authentication technique for e-banking service : a certificate, a personal identification number(PIN), a security card and a one-time password(OTP). Especially, the security card is most important means including secret information. If the secret information of card is leaked, it means not only loss of security but also easy to attack because security card is a difficult method to get. In this paper, we propose that a multi-channel security card saves an secret information in distributed channel. Proposed multi-channel security card reduces vulnerability of the exposed and has a function to prevent phishing attacks through decreasing the amount of information displayed and generating secret number randomly.

• Journal of Internet Computing and Services
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• v.8 no.5
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• pp.141-150
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• 2007

This paper proposes new Steganographic model for VoIP that has very effective method using low bit encoding. Most of Steganographic models using Low bit Encoding have two disadvantages; one is that the existence of hidden secret message can be easily detected by auditory, the other is that the capacity of stego data is low. To solve these problems, this method embed more than one bit in inaudible range, so this method can improve the capacity of the hidden message in cover data. The embedding bit position is determined by using a pseudo random number generator which has seed with remaining message length, so it is hard to detect the stego data produced by the proposed method. This proposed model is able to use not only to communicate wave file with hidden message in VoIP environment but also to hide vary information which is user basic information, authentication system, etc.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.4
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• pp.123-134
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• 2004

In this paper a high speed architecture of the RC4 stream cipher is proposed and its FPGA implementation is presented. Compared to the conventional RC4 designs which have long initialization operation or use double or triple S-arrays to reduce latency delay due to S-array initialization phase, the proposed architecture for RC4 stream cipher eliminates the S-array initialization operation using 256-bit valid entry scheme and supports 40/128-bit key lengths with efficient modular arithmetic hardware. The proposed RC4 stream cipher is implemented using Xilinx XCV1000E-6H240C FPGA device. The designed RC4 stream cipher has about a throughput of 106 Mbits/sec at 40 MHz clock and thus can be applicable to WEP processor and RC4 key search processor.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.1 s.307
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• pp.1-8
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• 2006

This thesis proposes Arithmetic Shift Register(ASR) which can be used as pseudo random number generator. Arithmetic Shift. Register is defined as progression that multiplies random number D , not 0 or 1 at initial value which is not 0, and it is represented as ASR-D in this thesis. Irreducible polynomial that t which makes $'D^k=1'$ satisfies uniquely as $'t=2^n-1'$ over. $GF(2^n)$ is the characteristic polynomial of ASR-D , and the cycle of Arithmetic Shift Register has maximum cycle as $'2^n-1'$. Galois Linear Feedback Shift Register corresponds to ASR-2-1. Therefore, Arithmetic Shift Register proposed in this thesis generalizes Galois Linear Feedback Shift Register. Linear complexity of ASR-D over$GF(2^n)$ is $'n{\leq}LC{\leq}\frac{n^2+n}{2}'$ and in comparison with existing Linear Feedback Shift Register stability is high. The Software embodiment of arithmetic shift register proposed in this thesis is efficient than that of existing Linear Shift Register and hardware complexity is equal. Arithmetic shift register proposed in this thesis can be used widely in various fields such as cipher, error correcting codes, Monte Carlo integral, and data communication etc along with existing linear shift register.

• Journal of Broadcast Engineering
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• v.20 no.1
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• pp.92-109
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• 2015

Broadcast encryption is a cryptographic primitive that allows a sender to securely broadcast a message to a set of receivers. The most influential broadcast encryption system was proposed in 2001 by Naor, Naor, Lotspiech, based on a pseudo-random generator and the Subset Difference (SD) method. In this paper, we suggest a new broadcast encryption system that is based on secret sharing and SD methods. On an efficiency aspect, our system achieves O(r) transmission cost, O($log^2n$) storage cost, and O(1) computational cost for the number n of users and the number r of revoked users. Compared to O(log n) computational cost in the previous SD method, our system has the advantage that it needs only constant-sized computational cost for decryption, regardless of the number n or r. On a security aspect, our system can achieve tighter security reduction than the previous SD method and the gap of security loss is about O(n log n). Moreover, our result shows that it is possible to give the effect of the SD method while using an information-theoretically secure key distribution technique as in the Complete Subtree method.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.4
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• pp.819-826
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• 2018

The generalized Hamming weight is one of the important parameters of the linear code. It determines the performance of the code when the linear codes are applied to a cryptographic system. In addition, when the block code is decoded by soft decision using the lattice diagram, it becomes a measure for evaluating the state complexity required for the implementation. In particular, a bit-parallel multiplier on finite fields based on trinomials have been studied. Cellular automata(CA) has superior randomness over LFSR due to its ability to update its state simultaneously by local interaction. In this paper, we deal with the efficient synthesis of the pseudo random number generator, which is one of the important factors in the design of effective cryptosystem. We analyze the property of the characteristic polynomial of the simple 90/150 transition rule block, and propose a synthesis algorithm of the reversible 90/150 CA corresponding to the trinomials $x^2^n+x^{2^n-1}+1$($n{\geq}2$) and the 90/150 reversible CA(RCA) corresponding to the maximum weight polynomial with $2^n$ degree by using this rule block.