• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.3
• /
• pp.312-318
• /
• 2016

This paper presents a 2-6 GHz GaN HEMT power amplifier monolithic microwave integrated circuit (MMIC) with bridged-T all-pass filters and output-reactance-compensation shorted stubs using the $0.25{\mu}m$ GaN HEMT foundry process that is developed by WIN Semiconductors, Inc. The bridged-T filter is modified to mitigate the bandwidth degradation of impedance matching due to the inherent channel resistance of the transistor, and the shorted stub with a bypass capacitor minimizes the output reactance of the transistor to ease wideband load impedance matching for maximum output power. The fabricated power amplifier MMIC shows a flat linear gain of 20 dB or more, an average output power of 40.1 dBm and a power-added efficiency of 19-26 % in 2 to 6 GHz, which is very useful in applications such as communication jammers and electronic warfare systems.

• Journal of electromagnetic engineering and science
• /
• v.17 no.3
• /
• pp.147-152
• /
• 2017

This paper presents a frequency doubler operating at G-band that exceeds the maximum oscillation frequency ($f_{max}$) of the given transistor technology. A common-source transistor is biased on class-B to obtain sufficient output power at the second harmonic frequency. The input and output impedances are matched to achieve high output power and high return loss. The frequency doubler is fabricated in a commercial 150-nm GaAs pHEMT process and obtains a measured conversion gain of -5.5 dB and a saturated output power of -7.5 dBm at 184 GHz.

• Proceedings of the KIPE Conference
• /
• 1996.06a
• /
• pp.63-66
• /
• 1996

An micro model for the power insulated Gate Bipolar Transistor(IGBT) is developed. The model consistently described the IGBT steady-state current-voltage characteristics and switching transient current and voltage waveform for all loading conditions. The model is based on the equivalent circuit of a MOSFET with supplies the base current to a low-gain, high-level injection, bipolar transistor with its base virtual contact at the collector and of the base. Model results are compared with measured turn-on and turn-off waveform for different drive, load, and feedback circuits.

• Journal of Institute of Control, Robotics and Systems
• /
• v.18 no.4
• /
• pp.371-374
• /
• 2012

DC/DC switching power converters produce DC output voltages from different stable DC input sources regulated by a bi-polar transistor. The converters can be used in regenerative braking of DC motors to return energy back in the supply, resulting in energy savings for the systems containing frequent stops. The voltage mode DC/DC converter is composed of a PWM (Pulse Width Modulation) controller, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an inductor, and capacitors, etc. PWM is applied to control and regulate the total output voltage. It is shown that the output of DC/DC converter depends on the variation of threshold voltage at MOSFET and the variation of pulse width. In the PWM operation, the missing pulses, the changes in pulse width, and a change in the period of the output waveform are studied by SPICE (Simulation Program with Integrated Circuit Emphasis) and experiments.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.359-359
• /
• 2010

IGBT(Insulated Gate Bipolar Transistor) 란 MOS(Metal Oxide Silicon) 와 Bipolar 기술의 결정체로 낮은 순방향 손실(Low Saturation)과 빠른 Speed를 특징으로 기존의 Thyristor, BJT, MOSFET 등으로 실현 불가능한 분양의 응용처를 대상으로 적용이 확대 되고 있고, 300V 이상의 High Power Application 영역에서 널리 사용되고 있는 고효율, 고속의 전력 시스템에 있어서 필수적으로 이용되는 Power Device이다. IGBT는 출력 특성 면에서 Bipolar Transistor 이상의 전류 능력을 가지고 있고 입력 특성 면에서 MOSFET과 같이 Gate 구동 특성을 갖기 때문에 High Switching, High Power에 적용이 가능한 소자이다. 반면에, Conventional IGBT는 MOSFET과 달리 IGBT 내부에 Anti-Parallel Diode가 없기 때문에 Inductive Load Application 적용시에는 별도의 Free Wheeling Diode가 필요하다. 그래서, 본 논문에서 별도의 Anti-Parallel Diode의 추가 없이도 Inductive Load Application에 적용 가능한 RC IGBT를 적용하여 600V/15A급 Three Phase Inverter Module을 제안 하고자 한다.

• Proceedings of the IEEK Conference
• /
• 2001.06b
• /
• pp.377-380
• /
• 2001

In this paper, we propose new partial product compressor and ENMODL (Enhanced-NORA-MODL) CLA(Carry Look-ahead Adder) for high speed and low power multiplier. To reduce transistor count, area, power we developed two new-approaches. One is small size partial product compressor, the other is dynamic CMOS logic ENMODL CLA. The transistor count of new compressor is reduced by 11% as compared with that of conventional one. The speed of ENMODL CLA is increased by 6.27% as compared with NMODL CLA.

• Proceedings of the IEEK Conference
• /
• 1999.11a
• /
• pp.363-367
• /
• 1999

In this paper, a novel 108-bit conditional sum adder(CSA) with Energy Economized Pass-transistor Logic(EEPL) is proposed. A new architecture is adopted, in order to obtain a high speed operation, which is composed of seven modularized 16-bit CMS's and two separated carry generation block. Further a design technique based on EEPL is proposed to reduce the power consumption. With 0.65${\mu}{\textrm}{m}$ single poly, triple metal, 3.3V CMOS process, its operating speed is about 4.95㎱ and the power consumption is reduced in comparison with that of the conventional adder.

• Electrical & Electronic Materials
• /
• v.9 no.9
• /
• pp.969-977
• /
• 1996

본고에서는 여러가지 Wide Band-gap중에서 특히 최근에 많은 관심을 끌고 있는 GaN와 4H-SiC, 6H0SiC의 전자기적 물성을 소개하고 현재 이들로부터 제작된 prototype소자들의 성능을 비교함으로써 그 발전현황을 알아보기로 한다. 본고에서 관심을 두는 소자분야는 광전소자(optoelectronic devices)라기보다는 고주파 고출력용 전력소자임을 밝힌다. 아울러 GaN로부터 제작된 MESFET(MEtal Semiconductor Field-Effect Transistor)소자의 고주파 대역에서의 Large-Signal특성을 Device/Circuit Model을 통하여 실험치와 비교하여보고 이로부터 최적화된 channel 구조를 갖는 소자구조에서의 RF특성을 조사한다.

• Journal of Electrical Engineering and information Science
• /
• v.2 no.6
• /
• pp.28-35
• /
• 1997

A new approach concurrent transistor sizing and buffer insertion for low power optimization is proposed in this paper. The method considers the tradeoff between upsizing transistors and inserting buffers and chooses the solution with the lowest possible power and area cost. It operates by analyzing the feasible region of the cost-delay curves of the unbuffered and buffered circuits. As such the feasible region of circuits optimized by our method is extended to encompass the envelop of cost-delay curves which represent the union of the feasible regions of all buffered ad unbuffered versions of the circuit. The method is efficient and tunable in that optimality can be traded for compute time and as a result it can in theory near optimal results.

• Journal of Power Electronics
• /
• v.15 no.4
• /
• pp.964-973
• /
• 2015

This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.