• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.987-990
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• 2003

산업현장에서의 인터넷환경 및 원격 제어를 위한 시스템 개발에서 신뢰성이 있고 경제적이며 지능적인 Power Supply가 요구되고 있다. 최근 통신시스템의 Power Supply는 수 kA이상의 출력전류를 가지고 있으며 최소 10개 이상의 모듈로 이루어져 있다. High-End 서버 시스템과 같이 수백 개의 마이크로프로세서를 내장한 시스템은 수십 kW의 전력을 소모한다. 이들이 사용하는 Power Supply는 별도의 시스템 제어기와의 통신으로 시스템에서 발생하는 발열, 소모전력, Total Harmonic Distortion (THD)에 대한 정보를 바탕으로 시스템이 갖는 각각의 Module에 대해 효과적이고 신뢰성 있는 전력공급을 하여야 만다. Distributed Power System (DPS)에서 가장 중요만 역할을 담당하는 Power Factor Correction (PFC) AC-DC Converter의 디지털 제어는 시스템 제어기와의 통신능력을 충분히 고려하면서 DPS를 위한 적합한 솔루션을 제공할 것이다. 본 논문에서는 Digital Signal Processor (DSP)를 사용하여 PFC 제어에 필요한 전파정류전압, 입력전류, 출력전압을 계측하여 역률개선과 THD의 저감을 위한 전류의 추종을 제어하면서 이들 제어기에서의 파라미터를 PC를 통해 모니터하여 최근의 추세를 만족시킬 수 있는 시스템을 구현할 수 있을 것으로 사료된다.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.6
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• pp.515-522
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• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both v voltage-fed and current-f,어 ek'Ctronic ballast. The proposed PFC circuits use valley-fil[(VF) type DClink s stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations d during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant c capaCltor In current-fed type, the charge pump capacitors are connc'Ctc'Cl with the additional second따y-side of t the power transformer. The measured PF is higher than 0.99 and THD is about 10% for all proposed PFC c circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for i implementing cost longrightarroweffective electronic ballast.

• Journal of Power Electronics
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• v.12 no.5
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• pp.689-698
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• 2012

This paper investigates the effects of applying different input current waveshapes on the performance of a continuous-conduction-mode (CCM) power-factor-correction (PFC) boost pre-regulator. It is found that the output voltage ripple of the pre-regulator can be reduced if the input current is modified to include controlled amount of higher order harmonics. This finding allows us to balance the performance of output regulation and the harmonic current emission when coming to the design of the pre-regulator. An experimental PFC boost pre-regulator prototype is constructed to verify the analysis and show the benefit of the pre-regulator operating with input current containing higher order harmonics.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1664-1672
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• 2015

This paper proposes a series arc fault detection algorithm which incorporates peak voltage and harmonic current detectors for single-phase boost power factor correction (PFC) rectifiers. The series arc fault model is also proposed to analyze the phenomenon of the arc fault and detection algorithm. For arc detection, the virtual dq transformation is utilized to detect the peak input voltage. In addition, multiple combinations of low- and high-pass filters are applied to extract the specific harmonic components which show the characteristics of the series arc fault conditions. The proposed model and the arc detection method are experimentally verified through a boost PFC rectifier prototype operating under the grid-tied condition with an artificial arc generator manufactured under the guidelines for the Underwriters Laboratories (UL) 1699 standard.

• Proceedings of the KIPE Conference
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• 2019.11a
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• pp.61-63
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• 2019

본 논문은 3.3 kW 전기자동차용 탑재형 충전기의 전력 밀도 향상을 위해 디커플링 기법이 적용된 PFC (Power factor correction) 회로의 초치적 설계 방안을 제안한다. 최적 설계를 위하여 buck-boost 컨버터 형태의 디커플링 회로 동작 원리를 기반으로 스위칭 주파수에 따른 PFC 회로의 손실과 부피를 분석하고 최적 설계점을 도출한다.

• Proceedings of the KIPE Conference
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• 1996.06a
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• pp.85-88
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• 1996

New power factor correction(PFC) technique based on the averaged model of boost converter is proposed. Without measurement of input current, power factor correction scheme derived from the averaged model is presented. With the measurements of input voltage and output voltage, the control signal is generated to make the shape of the line current same as the input voltage. The characteristics of input line current distortion is analyzed by considering the generation of duty cycle.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.77-80
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• 2003

Switching Mode Power Supply(SMPS) is widely used in many industrial fields. Power factor improvement and harmonic reduction technique are very important in SMPS. In this paper, we propose the circuit applied Flying Capacitor Snubber for improving power factor of boost converter on fast switching state. Snubber circuit consists of a inductor, two diodes and a capacitor. The losses of switching are reduced by inserting a snubber inductor in the series path of the boost switch and the rectifier diode to control the di/dt rate of the rectifier during it's turn-off. Prior to actual experiment, the circuit analysis Is implemented by PSPICE simulation.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1244-1246
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• 2003

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic content. Typically, these SMPS have a power factor lower than 0.65. To improve with this problem. the power factor correction(PFC) circuit of power supplies has to be introduced. Specially, to reduce size and manufacture cost of power conversion device, the single-stage PFC converter is increased to demand as necessary of study. In this case single-stage PFC converter has been used DC-DC converter with boost converter. However in this paper, it is studied flyback converter of high power factor, high efficiency by feedforward control. Also, the validity of designed and manufactured high power factor flyback converter is confirmed by simulation and experimental results.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.4
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• pp.47-52
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• 1999

This paper proposed simplified method to complicated Power Stage with a new On-line UPS scheme by replacing essential battery-voltage booster with a dual-functional PFC. Direct Load Voltage (${V_o}$) can not be applied to high voltage switching converter due to ripple from traditional Power Factor Correction (PFC) but Boost Function of On-line UPS is united so that the cost of system design and development is inexpensive. Through varification of experimental result, proposed UPS scheme shows its performance, low cost and high power density.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.98-103
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• 2001

In case that electronic ballast employing a valley-fill passive power factor correction (PFC) circuit is used for feeding fluorescent lamps, a new method to reduce crest factor of the lamp current is studied in this paper. In order to reduce crest factor to lower value, a pulse frequency modulation technique based on the waveform of the dc-link voltage which is predetermined by the passive PFC circuit, is taken into the switching control action of the electronic ballast. An equation-based analysis between the crest factor of lamp current and the effect of varying the inverter switching frequency is comprehensively performed.