• Journal of Sensor Science and Technology
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• v.7 no.5
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• pp.356-363
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• 1998

Using the results analyzed by FEM(Finite Element Method). the microheaters with the stress-balanced $Si_3N_4$(150 nm)/$SiO_2$(300 nm)/$Si_3N_4$(150 nm) diaphragms were fabricated by silicon micromachining techniques. Pt was used as microheater materials. Pt temperature sensor was fabricated to measure the temperature of microheaters. Resistance of temperature sensor and power dissipation of microheater were measured and calculated at the various temperatures. The thermal distribution of heater was examined by a IR thermoviewer. Measured and simulated results are compared and analyzed. The temperature coefficient of resistance of heater was about $0.00379/^{\circ}C$. Pt heater showed the power dissipation of about 51 mW at $300^{\circ}C$ and a uniform thermal distribution on the surface.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.5
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• pp.1143-1150
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• 2000

A dual-mode multiplier (DMM) that performs single- and double-precision multiplications has been designed using a $0.25-\mum$ 5-metal CMOS technology. An algorithm for efficiently implementing double-precision multiplication with a single-precision multiplier was proposed, which is based on partitioning double-precision multiplication into four single-precision sub-multiplications and computing them with sequential accumulations. When compared with conventional double-precision multipliers, our approach reduces the hardware complexity by about one third resulting in small silicon area and low-power dissipation at the expense of increased latency and throughput cycles. The DMM consists of a $28-b\times28-b$ single-precision multiplier designed using radix-4 Booth receding and redundant binary (RB) arithmetic, an accumulator and a simple control logic for mode selection. It contains about 25,000 transistors on the area of about $0.77\times0.40-m^2$. The HSPICE simulation results show that the DMM core can safely operate with 200-MHZ clock at 2.5-V, and its estimated power dissipation is about 130-㎽ at double-precision mode.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.1
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• pp.68-75
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• 2009

In this paper, an efficient proposed CDR(Clock and Data Recovery Circuits) using 1/4-rate clock based on dual-interpolator is proposed. The CDR is aimed to overcome problems that using multi-phase clock to decrease the clock generator frequency causes side effects such as the increased power dissipation and hardware complexity, especially when the number of channels is high. To solve these problems, each recovery part generates needed additional clocks using only inverters, but not flip-flops while maintaining the number of clocks supplied from a clock generator the same as 1/2-rate clock method. Thus, the reduction of a clock generator frequency using 1/4-rate clocking helps relax the speed limitation and power dissipation when higher data rate transfer is demanded.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.11C
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• pp.963-969
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• 2008

This paper presents 6bit 100MHz Interpolation Flash Analog-to-Digital Converter, which can be applied to the Receiver of Wireless Tele-communication System. The 6bit 100MHz Flash Analog-to-Digital Converter simplifies and integrates S-R latch which multiplies as the resolution increases. Whereas the conventional NAND based S-R latch needed eight MOS transistors, this Converter was designed with only six, which makes the Dynamic Power Dissipation of the A/D Converter reduced up to 12.5%. The designed A/D Converter went through $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process to be a final product, and the final product has shown 282mW of power dissipation with 1.8V of Supply Voltage, 100MHz of conversion rate. And 35.027dBc, 31.253dB SFDR and 4.8bits, 4.2bits ENOB with 12.5MHz, 50MHz of each input frequency.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.7
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• pp.539-544
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• 2013

To study the encapsulation method for heat dissipation of high brightness organic light emitting diode (OLED), red emitting OLED of ITO (150 nm) / 2-TNATA (50 nm) / NPB (30 nm) / $Alq_3$ : 1 vol.% Rubrene (30 nm) / $Alq_3$ (30 nm) / LiF (0.7 nm) / Al (200 nm) structure was fabricated, which on $Alq_3$ (150 nm) / LiF (150 nm) as buffer layer and Al as protective layer was deposited to protect the damage of OLED, and subsequently it was encapsulated using attaching film and metal sheet. The current density, luminance and power efficiency was improved according to thickness of Al protective layer. The emission spectrum and the Commission International de L'Eclairage (CIE) coordinate did not have any effects on encapsulation process using attaching film and metal sheet The lifetime of encapsulated OLED using attaching film and metal sheet was 307 hours in 1,200 nm Al thickness, which was increased according to thickness of Al protective layer, and was improved 7% compared with 287 hours, lifetime of encapsulated OLED using attaching film and flat glass. As a result, it showed the improved current density, luminance, power efficiency and the long lifetime, because the encapsulation method using attaching film and metal sheet could radiate the heat on OLED effectively.

• Nuclear Engineering and Technology
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• v.56 no.1
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• pp.78-91
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• 2024

Double steel plate concrete composite shear wall (SCSW) has been widely utilized in nuclear power plants and high-rise structures, and its shear connectors have a substantial impact on the seismic performance of SCSW. Therefore, in this study, the mechanical properties of SCSW with angle stiffening ribs as shear connections were parametrically examined for the reactor containment structure of nuclear power plants. The axial compression ratio of the SCSW, the spacing of the angle stiffening rib arrangement and the thickness of the angle stiffening rib steel plate were selected as the study parameters. Four finite element models were constructed by using the finite element program named ABAQUS to verify the experimental results of our team, and 13 finite element models were established to investigate the selected three parameters. Thus, the shear capacity, deformation capacity, ductility and energy dissipation capacity of SCSW were determined. The research results show that: compared with studs, using stiffened ribs as shear connectors can significantly enhance the mechanical properties of SCSW; When the axial compression ratio is 0.3-0.4, the seismic performance of SCSW can be maximized; with the lowering of stiffener gap, the shear bearing capacity is greatly enhanced, and when the gap is lowered to a specific distance, the shear bearing capacity has no major affect; in addition, increasing the thickness of stiffeners can significantly increase the shear capacity, ductility and energy dissipation capacity of SCSW. With the rise in the thickness of angle stiffening ribs, the improvement rate of each mechanical property index slows down. Finally, the shear bearing capacity calculation formula of SCSW with angle stiffening ribs as shear connectors is derived. The average error between the theoretical calculation formula and the finite element calculation results is 8% demonstrating that the theoretical formula is reliable. This study can provide reference for the design of SCSW.

• Journal of IKEEE
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• v.28 no.1
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• pp.38-45
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• 2024

Most previous works about magnetic effect on plasma emission were interested in emission enhancement which was useful to various fields of plasma application. On the contrary, the following work is interested in plasma dissipation rarely reported in prior researches and expected to help advance plasma-controlling technique. Nd:YAG laser (1064 nm, 6 ns) was focused on three kinds of metals (Al, Ti and STS) and air. The permanent magnetic field (0.4 T) of Nd₂Fe₁₄B magnet was provided passing throughout laser-induced plasma. The spectra of plasma in both the presence and absence of the magnetic field were observed with varying laser power and delay time of the spectrograph. In this work it was uniquely discovered that the plasma always dissipated easily in the presence of magnetic field irrespective of the laser power. With the O I(777.42 nm)-line shape function fitted to Lorentz profile, its half width at half maximum (HWHM) was evaluated to verify that the magnetic field increased the plasma density. It is concluded that magnetic field facilitates not only plasma emission enhancement but also plasma dissipation, increasing recombination rate which is proportional to plasma density.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1674-1676
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• 1999

Oxide of the form $Mn_3O_4-CuO-Co_3O_4$-NiO-ZnO present properties that make them useful as power NTC thermistor for current limited. Power NTC thermistor electric properties of $Mn_3O_4-CuO-Co_3O_4$-NiO-ZnO system has been measured as a function of temperature and composition and current - voltage, time constant, activation energy, heat dissipation coefficient have also been determined.

• ETRI Journal
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• v.30 no.1
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• pp.113-128
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• 2008

Turbo codes are extensively used in current communications standards and have a promising outlook for future generations. The advantages of software defined radio, especially dynamic reconfiguration, make it very attractive in this multi-standard scenario. However, the complex and power consuming implementation of the maximum a posteriori (MAP) algorithm, employed by turbo decoders, sets hurdles to this goal. This work introduces an ASIP architecture for the MAP algorithm, based on a dual-clustered VLIW processor. It displays the good performance of application specific designs along with the versatility of processors, which makes it compliant with leading edge standards. The machine deals with multi-operand instructions in an innovative way, the fetching and assertion of data is serialized and the addressing is automatized and transparent for the programmer. The performance-area trade-off of the proposed architecture achieves a throughput of 8 cycles per symbol with very low power dissipation.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.494-498
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• 2004

In this paper, the design of a CMOS exponential V-I converter (EVIC,) based on Taylor's concept, is presented. The composite NMOS transistor is used for realizing the exponential characteristics. In a 0.25 $\mu$m CMOS process, the simulations show more than 20 dB output current range and 15 dB linear range with the linearity error less than $\pm$ 0.5 dB. The power dissipation is less than 0.3 mW with $\pm$ 1.5 V supply voltage. The proposed EVIC can be used for the design of an extremely low­voltage and low-power variable gain amplifier (VGA) and automatic gain control (AGC).