• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.169-169
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• 2010

As display industry requires various applications for future display technology, which can guarantees high level of flexibility and transparency on display panel, oxide semiconductor materials are regarded as one of the best candidates. $InGaZnO_4$(IGZO) has gathered much attention as a post-transition metal oxide used in active layer in thin-film transistor. Due to its high mobility fabricated at low temperature fabrication process, which is proper for application to display backplanes and use in flexible and/or transparent electronics. Electrical performance of amorphous oxide semiconductors depends on the resistance of the interface between source/drain metal contact and active layer. It is also affected by sheet resistance on IGZO thin film. Controlling contact/sheet resistance has been a hot issue for improving electrical properties of AOS(Amorphous oxide semiconductor). To overcome this problem, post-annealing has been introduced. In other words, through post-annealing process, saturation mobility, on/off ratio, drain current of the device all increase. In this research, we studied on the relation between device's resistance and post-annealing temperature. So far as many post-annealing effects have been reported, this research especially analyzed the change of electrical properties by increasing post-annealing temperature. We fabricated 6 main samples. After a-IGZO deposition, Samples were post-annealed in 5 different temperatures; as-deposited, $100^{\circ}C$, $200^{\circ}C$, $300^{\circ}C$, $400^{\circ}C$ and $500^{\circ}C$. Metal deposition was done on these samples by using Mo through E-beam evaporation. For analysis, three analysis methods were used; IV-characteristics by probe station, surface roughness by AFM, metal oxidation by FE-SEM. Experimental results say that contact resistance increased because of the metal oxidation on metal contact and rough surface of a-IGZO layer. we can suggest some of the possible solutions to overcome resistance effect for the improvement of TFT electrical performances.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.274-277
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• 2000

Thin Film Transistor(TFTs) were fabricated from poly-Si crystallized by a two-step annealing process on glass substrates. The combination of low-temperature(500$^{\circ}C$) Metal-Induced Lateral Crystallization(MILC) furnace annealing and high -temperature (700$^{\circ}C$) rapid thermal annealing leads to the improvement of the material quality The TFTs measured with this two-step annealing material exhibit better characteristics than those obtained by using conventional MILC furnace annealing.

• Journal of Korean Vacuum Science & Technology
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• 제6권2호
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• pp.79-83
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• 2002

As Ag does not form my silicide on Si surfaces, Ag wire is a candidate for self-assembled nanowire on the reconstructed and single-domain Si(5 5 12)-2 $\times$ 1. In the present study, various Ag coverages and post-annealing temperatures had been tested to fabricate a Ag nanowire with high aspect ratio. When Ag coverage was less than 0.03 ML and the post-annealing temperature was 500(C, Ag atoms preferentially adsorbed on the tetramer sites resulting in Ag wires with an inter-row spacing of ~5 nm. However, its aspect ratio is relatively small and its height is also not even. On the other hand, the Ag-posited surface completely loses its reconstruction even with the same annealing at 500 $\^{C}$ if the initial coverage exceeds 0.05 ML. But the additional subsequent annealing at 700$\^{C}$ and slow-cooling process recovers the well-ordered Ag chain with relatively high aspect ratio on the same tetramer sites. It can be understood that, in the double step annealing process, the lower temperature annealing is required for cohesion of adsorbed Ag atoms and the higher temperature annealing is for providing Ag atoms to the tetramer sites.

• 공업화학
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• 제24권4호
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• pp.438-442
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• 2013

본 연구에서는 무전해 도금법으로 니켈과 인을 탄소섬유 표면에 코팅한 후, 열처리시키는 과정에서 일어나는 변화를 다양한 분석방법을 이용하여 연구하였다. 전자현미경(Scanning Electron Microscopy, SEM)을 이용한 연구에서는, 코팅 후 추가적인 열처리를 하지 않은 경우 평평한 표면구조를 관찰하였으나, 열처리 온도가 $350^{\circ}C$에 이르면서 다공성구조가 생성됨을 알았다. 열처리 온도를 $50^{\circ}C$ 간격으로 증가시키면서 연구한 결과 $650^{\circ}C$까지는 열처리 온도가 증가할수록 기공의 크기는 증가하고, 개수는 감소하는 경향성이 관찰되었다. X-선 회절법(x-ray diffraction, XRD) 측정 결과, 코팅 후 추가 열처리가 없는 경우 금속성 Ni, Ni-P 화합물이 관찰되었으며, 열처리 온도가 증가함에 따라 NiO 봉우리는 세기가 증가하며, 금속성 Ni 봉우리의 세기는 감소하였다. X-선 광전자 분광법(X-ray Photoelectron Spectroscopy, XPS) 측정에서는 $650^{\circ}C$, $700^{\circ}C$의 열처리 후 인 산화물이 표면에서 검출됨을 확인하였는데, 이는 코팅된 니켈 필름의 내부에 존재하던 인 화합물이 열처리 온도가 증가함에 따라서 표면 밖으로 빠져 나오는 현상이 일어나는 결과로 해석할 수 있다. 이상의 분석 데이터를 토대로, 무전해 도금으로 코팅된 Ni-P 화합물($Ni_xP_y$)이 열처리 과정에서 산화되면서, 이때 생성된 인 화합물 기체가 승화하면서 필름에 기공을 생성시키는 것으로 제안할 수 있다. 다공성 물질은 넓은 비표면적 등의 우수한 물성때문에 불균일 촉매 등 다양한 분야에 적용될 수 있으며, 본 연구에서 소개하는 다공성 니켈 필름의 제작법은 대량 생산에 적용이 쉬워 환경 필터 분야 등의 다양한 곳에 응용될 수 있을 것으로 생각된다.

• 청정기술
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• 제15권3호
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• pp.202-209
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• 2009

질소 도핑된 $WO_3$ ($WO_3$:N) 막을 반응성 RF 마그네트론 스퍼터링을 이용하여 상온에서 증착한 다음, $300^{\circ}C$에서부터 $500^{\circ}C$의 온도 구간에서 후열처리(post-annealing)하였다. $WO_3$ 내 질소 음이온은 O 2p valence state와의 mixing effect 의해 광학적 밴드갭을 줄임으로써 장파장 영역의 빛을 흡수할 수 있었다. 더욱이 $350^{\circ}C$ 이상의 후열처리에 의해 $WO_3$:N의 결정성이 크게 향상됨을 발견하였으며, 동일 온도에서 열처리된 순수한 $WO_3$ 막보다 광전기화학 특성이 휠씬 우수한 셀 성능을 가짐을 알 수 있었다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2010년도 추계학술대회 초록집
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• pp.46.1-46.1
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• 2010

Surface passivation of crystalline silicon(c-Si) surface with a-Si:H thin films has been investigated by using quasi-steady-state photo conductance(QSSPC) measurements. Analyzing the influence of a-Si:H film thickness, process gas ratio, deposition temperature and post annealing temperature on the passivation properties of c-Si, we optimized the passivation conditions at the substrate temperature of $200-250^{\circ}C$. Best surface passivation has been obtained by post-deposition annealing of a-Si:H film layer. Post annealing around the deposition temperature was sufficient to improve the surface passivation for silicon substrates. We obtained effective carrier lifetimes above 5.5 ms on average.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.1151-1152
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• 2015

Silicon zinc oxide (SZO) thin films were deposited via co-sputtering. Two kinds of post-treatment, furnace annealing and hot pressing, were carried out on the deposited SZO films. The effects of the post-treatment on the chemical bond and surface roughness of the deposited SZO films were analyzed as functions of the post-treatment conditions that were used. It was observed from the X-ray photoelectron spectroscopy (XPS) results that the amount of Si-O bonds in the SZO film drastically increased after the low-temperature furnace annealing. The experiment results showed that the hot pressing method would be favorable as it could improve the electrical characteristics of the SZO-TFTs.

• 한국진공학회지
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• 제1권1호
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• pp.206-211
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• 1992

SIMOX SOI structures were formed by oxygen ion implantation with a dose of 2 1018 ions/cm2 at 180kev and post-implantation annealing at $1250^{\circ}C$ for 6 hours in nitrogen ambient. The oxygen redistribution process during post-implantation annealing was examined by AES and TEM. The electrical property of the structure was investigated by SRP method. We could find oxygen precipitates in SOI layer was discussed. And the limiting factor to the decrease of the precipitates during post-implantation annealing was discussed also.

• Bulletin of the Korean Chemical Society
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• 제25권12호
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• pp.1859-1862
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• 2004

Europium doped yttrium vanadate ($YVO_4$:Eu) phosphor thin films were grown using a pulsed laser deposition (PLD) technique on silicon substrate. The structural characterization carried out on a series of ($YVO_4$:Eu films at post annealing temperature in the range of 550 $^{\circ}C$-1150 $^{\circ}C$ indicating that films were preferentially (200) oriented at post annealing temperature above 950 $^{\circ}C.$ Photoluminescence of thin film increased with the increase of post annealing temperature and ambient oxygen pressure though the thin film has the powder-like surface morphology at oxygen pressure above 200 mTorr. Photoluminescence decay from $^5D_1$ level of $Eu^{3+}$ show the great concentration dependency, which can be used as a good parameter to control the composition of ($YVO_4$:Eu thin film.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.709-712
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• 2001

The effects of post annealing temperature by the Rapid Thermal Annealing(RTA) on the electrical properties of Pb(Zr,Ti)O$_3$(PZT) thin film were investigated. Analyses by the RTA treatments reveled that the leakage current of PZT thin films strongly depend on heating temperature and time. It was found that leakage current properties of PZT capacitor were changed by heating temperature during the RTA annealing. On Pt/Ti/Si substrates, PZT films are deposited at 350 $^{\circ}C$ by rf magnetron sputtering. The X-ray diffusion (XRD) was confirmed the formation of PZT thin film. Leakage current characteristics were improved with decreasing the post annealing temperature of PZT thin film. RTA annealed film on the 700$^{\circ}C$ shows ferroelectric and electrical properties with a remanent polarization of 12.4${\mu}$C/$\textrm{cm}^2$ coercive field of 117kV/cm, leakage current J= 6.2${\times}$10$\^$-6/ A/$\textrm{cm}^2$