• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.445-446
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• 2005

This letter reports the fabrication of polycrystalline silicon thin-film transistors (poly-Si TFT) on flexible plastic substrates using amorphous silicon (a-Si) precursor films by sputter deposition. The a-Si films were deposited with mixture gas of argon and helium to minimize the argon incorporation into the film. The precursor films were then laser crystallized using XeCl excimer laser irradiation and a four-mask-processed poly-Si TFTs were fabricated with fully self-aligned top gate structure.

• Journal of the Korean Vacuum Society
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• v.12 no.2
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• pp.130-135
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• 2003

Polycrystalline silicon thin films have been used for low cost thin film device application. However, it was very difficult to fabricate high performance poly-Si at a temperature lower than $600^{\circ}C$ for glass substrate because the crystallization process technologies like conventional solid phase crystallization (SPC) require the number of high temperature (600-$1000^{\circ}C$) process. The objective of this paper is to grow poly-Si on flexible substrate using a rapid thermal crystallization (RTC) of amorphous silicon (a-Si) layer and make the high temperature process possible on molybdenum substrate. For the high temperature poly-Si growth, we deposited the a-Si film on the molybdenum sheet having a thickness of 150 $\mu\textrm{m}$ as flexible and low cost substrate. For crystallization, the heat treatment was performed in a RTA system. The experimental results show the grain size larger than 0.5 $\mu\textrm{m}$ and conductivity of $10^{-5}$ S/cm. The a-Si was crystallized at $1050^{\circ}C$ within 3min and improved crystal volume fraction of 92 % by RTA. We have successfully achieved a field effect mobility over 67 $\textrm{cm}^2$/Vs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.6
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• pp.372-376
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• 2018

The effects of off-state bias stress on the characteristics of p-type poly-Si TFT were investigated. To reduce the gate-induced drain leakage (GIDL) current, the off-state bias stress was changed by varying Vgs and Vds. After application of the off-state bias stress, the Vgs causing GIDL current was dramatically increased from 1 to 10 V, and thus, the Vgs margin to turn off the TFT was improved. The on-current and subthreshold swing in the aged TFT was maintained. We performed a technology computer-aided design (TCAD) simulation to describe the aged characteristics. The aged-transfer characteristics were well described by the local charge trapping. The activation energy of the GIDL current was measured for the pristine and aged characteristics. The reduced GIDL current was mainly a thermionic field-emission current.

• Journal of Information Display
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• v.6 no.3
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• pp.22-25
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• 2005

In this study, we attempted to find the origin of brightness non-uniformity in SLS poly-Si TFT AMOLED. By developing a suitable SLS process with a compensation circuit, we successfully improved the non-uniformity from 40% to 1.7%. In addition, we were able to fabricate 2.2" AMOLED display using SLS poly-Si.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.239-242
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• 2008

We have investigated the reliability of short channel ($L=1.5{\mu}m$) p-type ELA poly-Si TFTs under hot carrier stress. Threshold voltage of short channel TFT was significantly more shifted to positive direction than that of long channel TFT under the same stress. This result may be attributed to electron trapping at the interface between poly-Si film and gate oxide layer.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1442-1444
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• 2001

A new low-temperature poly-Si TFT employing a counter-doped lateral body terminal is proposed and fabricated, in order to enhance the stability of poly-Si TFT driving circuits. The LBT structure effectively suppresses the kink effect by collecting the counter-polarity carriers and suppresses the hot carrier effect by reducing the peak lateral field at the drain junction. The proposed device is immune to dynamic stress, so that it is suitable for low voltage and high speed driving circuits of AMLCD.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1462-1464
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• 1998

Poly-Si TFT(Thin Film Transistor) is a electronic device that can be applied to the field of large area electronics such as AMLCD. We have fabricated the poly-Si TFT with lateral body terminal that is counter-doped body electrode and investigated the electrical characteristics of it. The lateral body terminal being short with s terminal, we have measured the transfer charac (Vg-ld) and the output characteristic (Vd-ld) fabricated devices. The measured result showe only that leakage current in OFF-state was re and Kink effect in ON-state was suppressed bu that in output characteristic curve the output Id was sustained constantly with the output v Vd in the saturation region.

• Proceedings of the KIEE Conference
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• 1999.11d
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• pp.971-973
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• 1999

채널길이에 따른 n-채널과 p-채널 poly-Si TFT's를 제작하고 그 전기적 특성을 분석하였다. n-채널과 p-채널소자는 공통적으로 기생바이폴라트 랜지스터현상(parasitic bipolar transistor action)에 의한 kink 효과, 전하공유(charge sharing)에 의한 문턱전압의 감소, 소오스와 드레인 근처의 결함에 의한 RSCE(reverse short channel effect) 효과, 수직전계에 의한 이동도의 감소, 그리고 avalanche 증식에 의한 S-swing의 감소가 나타났다. n-채널은 p-채널 보다 더 큰 kink, 이동도, S-swing의 변화가 나타났으며, 높은 드레인 전압에서의 문턱전압의 이동은 avalanche 증식(multiplication)에 의한 것이 더 우세한 것으로 나타났다. 누설전류의 경우, 채널 길이가 짧아짐에 따라 n-채널은 큰 증가를 나타냈으나 p-채널의 경우는 변화가 나타나지 않았다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.10
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• pp.489-493
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• 2001

The on-current of offset and LDD structured devices in slightly decreased while the off-current are remarkably reduced and almost constant independent of gate and drain voltage because offset and LDD regions behave as a series resistance and reduce the lateral electric field in the drain depletion. Degradation of these devices is dependent upon the offset and LDD length rather than doping concentration in these regions. Also, degradation mechanism has been related to the interface generation rather than the hot carrier injection into gate oxide.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.457-460
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• 1999

The effects of electrical positive stress on n-channel LDD and offset structured poly-Si TFT\`s have been systematically investigated in order to analyze the transfer curve\`s shift mechanism. It has been found that the LDD and offset regions behave as a series resistance that reduce the electric field near drain. Hot carrier effects are reduced because of these results. After electrical stress transfer curve’s shift and variation of the off-current are dependent upon the offset length rather than offset region’s doping concentration. Variation of the subthreshold slope is dependent upon offset region’s doping concentration as well as offset length.