• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.93-94
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• 2007

다양한 LDD(lightly doped drain)에 따른 n-channel poly-Si TFT (thin film transistor)에 대하여 보고한다. 유리 기판 위에 ELA를 이용하여 만들어진 Polycrystalline silicon (poly-Si)은 TFT-LCD의 응용을 위한 재료로써 우수한 특성을 갖는다. 제작된 n-channel TFT는 절연층으로 $SiN_x$, $SiO_2$의 이중 구조를 갖는다. 다양한 LDD에 따른 n-channel poly-Si TFT의 문턱전압($V_{TH}$), ON/OFF 전류비 ($I_{ON}/I_{OFF}$), 포화전류($I_{DSAT}$)는 TFT의 보다 좋은 성능을 위해 연구된다. 짧은 LLD 길이를 가진 n-channel poly-Si TFT의 문턱전압은 작고, 포화전류의 값은 크다. 또한 긴 LLD 길이를 가진 n-channel poly-Si TFT는 작은 kink effect를 가진다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.315-318
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• 1999

We have proposed and fabricated the new bottom-gated polycrystalline silicon (poly-Si) thin film transistor (TFT) with a partial amorphous-Si region by employing the selective laser annealing. The channel layer of the proposed TFTs is composed of poly-Si region in the center and a-Si region in the edge. The TEM image shows that the local a-Si region is successfully fabricated by the effective cut out of the incident laser light in the upper a-Si layer. Our experimental results show that the ON/OFF current ratio is increased significantly by more than three orders in the new poly-Si TFT compared with conventional poly-Si TFT. The leakage current is decreased significantly due to the highly resistive a-Si re TFTs while the ON-series resistance of the local a-Si is reduced significantly due to the considerable inducement of electron carriers by the positive gate bias, so that the ON-current is not decreased much.

• Korean Journal of Materials Research
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• v.22 no.4
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• Journal of the Korean Ceramic Society
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• v.34 no.11
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• pp.1121-1128
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• 1997

In this study, the Ar plasma treatment was used to improve the surface roughness of Poly-Si1-xGex thin film deposited by RTCVD. The surface roughness and the resistivity of Si1-xGex thin film were investigated with variation of Ar plasma treatment parameters (electrode distance, working pressure, time, substrate temperature and R.F power). When the Ar plasma treatment was used, the cluster size decreased by the surface etching effect due to the increasing surface collision energy of particles (ion, neutral atom) in plasma under the conditions of decreasing electrode distance and increasing pressure, time, temperature, and R. F power. Although the surface roughness value decreased by the reduction of the cluster size due to surface etching effect, however, the resistivity increased. This may be due to the surface damage caused by the increasing surface collision energy. It was concluded that the surface roughness could be improved by the Ar plasma treatment, while the resistivity was increased by the surface damage on the substrate.

• Journal of Information Display
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• v.6 no.4
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• pp.6-10
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• 2005

The dependence of hysteresis characteristics in low temperature poly-Si (LTPS) thin film transistors (TFTs) on the gate-source voltage (Vgs) or the drain-source voltage (Vds) bias is investigated and discussed. The hysteresis levels in both p-type and n-type LTPS TFTs are independent of Vds bias but increase as the sweep range of Vgs increases. It has been found that the hysteresis in both p-type and n-type LTPS TFTs originated from charge trapping and de-trapping in the channel region rather than at the source/drain edges.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.118-119
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• 2007

High performance three-dimensional (3-D) stacked poly-Si complementary metal-oxide semiconductor (CMOS) inverters with a high quality laser crystallized channel were fabricated. Low temperature crystallization methods of a-Si film using the excimer-laser annealing (ELA) and sequential lateral solidification (SLS) were performed. The NMOS thin-film-transistor (TFT) at lower layer of CMOS was fabricated on oxidized bulk Si substrate, and the PMOS TFT at upper layer of CMOS was fabricated on interlayer dielectric film. The 3-D stacked poly-Si CMOS inverter showed excellent electrical characteristics and was enough for the vertical integrated CMOS applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.995-998
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• 2003

This paper presents the deposition of poly-Si thin-film and fabrication of a solar cell by VHF-PECVD method. The poly-Si thin films. and pin-type solar cells are fabricated using multi-chamber cluster tool system. A 7.4% conversion efficiency was achieved from poly-Si thin film solar cells with total thickness less than $5{\mu}m$. The physical characteristic was measured by Raman spectroscopy, solar cell characteristic was measured under AM1.5 illumination.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2008.06a
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• pp.139-140
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• 2008

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.95-97
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• 2004

We studied a low temperature ion doping process for poly-Si Thin Film Transistor (TFT) on plastic substrates. The ion doping process was performed using an ion shower system, and subsequently, excimer laser annealing (ELA) was done for the activation. We have studied the crystallinity of Si surface at each step using UV-reflectance spectroscopy and the sheet resistance using 4-point probe. We found that the temperature has increased during ion shower doping for a-Si film and the activation has not been fulfilled stably because of the thermal damage against the plastic substrate. By trying newly a pulsed ion shower doping, the ion was efficiently incorporated into the a-Si film on plastic substrate. The sheet resistance decreased with the increase of the pulsed doping time, which was corresponded to the incorporated dose. Also we confirmed a relationship between the crystallinity and the sheet resistance. A sheet resistance of 300 ${\Omega}$/sq for the Si film of 50nm thickness was obtained with a good reproducibility. The ion shower technique is a promising doping technique for ultra low temperature poly-Si TFTs on plastic substrates as well as those on glass substrates.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.04a
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• pp.62-63
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• 2006

In this paper, the characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated on polymer substrates are investigated. The a-Si films was laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated nMOS TFT showed field-effect mobility of $30cm2/V{\cdot}s$, on/off ratio of 105 and threshold voltage of 5 V.