• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.999-1002
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• 2004

We propose and simulate a new integrated DAC analog buffer composed of only p-type poly-Si TFTs in AMLCD and AMOLED. Proposed circuit employs a voltage level shifter which $V_{OUT}$ has a linear functional relation to $V_{IN}$. The proposed scheme enables to allow a constant $V_{GS}$ of buffer transistor so that the charging speed of pixel data address is improved.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1414-1415
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• 2011

높은 게이트와 드레인 바이어스 스트레스 조건에서 신뢰성을 높이기 위해 비대칭 스페이싱 다중채널 구조 (ASS) 를 이용한 다결정 실리콘 박막 트래지스터 (poly-Si TFTs) 를 제안하였다. 이것은 어떠한 추가공정 없이 제작할 수 있고 채널 가운데 부분의 넓은 공간을 이용하여 소자안의 유도된 열을 방출할 수 있기 때문에 기존의 트랜지스터에 비해 47%의 문턱전압감소와 3%의 이동도 변화 감소를 보인다. 이 실험결과는 제안된 소자구조가 기존의 소자에 비해 높은 게이트와 드레인 바이어스 조건에서 전기적 특성이 더 안정적이라는 것을 보여준다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1301-1304
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• 2007

We have investigated degradation of short channel n-type poly-Si TFTs with LDD under high gate and drain voltage stress due to self-heating. We have found that the threshold voltage of short channel TFT is shifted to negative direction on the selfheating stress, whereas the threshold voltage of long channel is moved to positive direction.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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• pp.1038-1040
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• 2005

Linear kink effect (LKE) induced mainly by selfheating on the reliability of divided channel poly-Si TFTs has been studied. The LKE was enhanced for compact designed structure to achieve narrow bezel, which was explained by the difference in heat dissipation capability, thus self-heating immunity in TFT.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.289-292
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• 2005

New poly-Si TFTs have been proposed and fabricated in order to increases the output channel resistance ($r_o$). The counter-doped($p^+$) source is tied to the $n^+$ source and is extended into the channel region so that it employs the reverse bias depletion in the channel. As $V_{DS}$ is increased, the depletion width is increased and the effective channel width is reduced. Therefore, the output current saturates well and the $r_o$ is increased successfully. The proposed CMOS devices may improve the amplifier gain of data driver in active-matrix displays

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.841-842
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• 2006

This paper has proposed a serial 8-bit DAC for column driver circuits of mobile displays using LTPS TFTs. The DAC circuit takes very small area by using parasitic capacitance of column lines as sampling and holding capacitors. Moreover, the proposed DAC does not need the analog buffer, because the DAC operation is performed on the column lines. For the data driver circuits of 2-inch qVGA OLED panel, the DAC area is $84um{\times}800um$ and the simulated DAC power consumption is 8.5mW with 10-V supply voltage.

• E2M - 전기 전자와 첨단 소재
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• 제11권11호
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• pp.22-27
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• 1998

We have investigated the effect of an ion shower doping of the laser annealed poly-Si films at an elevated substrate temperatures. The substrate temperature was varied from room temperature to 300$^{\circ}C$ when the poly-Si film was doped with phosphorus by a non-mass-separated ion shower. Optical, structural, and electrical characterizations have been performed in order to study the effect of the ion showering doping. The sheet resistance of the doped poly-Si films was decreased from7${\times}$106 $\Omega$/$\square$ to 700 $\Omega$/$\square$ when the substrate temperature was increased from room temperature to 300$^{\circ}C$. This low sheet resistance is due to the fact that the doped film doesn't become amorphous but remains in the polycrystalline phase. The mildly elevated substrate temperature appears to reduce ion damages incurred in poly-Si films during ion-shower doping. Using the ion-shower doping at 250$^{\circ}C$, the field effect mobility of 120 $\textrm{cm}^2$/(v$.$s) has been obtained for the n-channel poly-Si TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.665-667
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• 2005

VIATRON TECHNOLOGIES has developed FE-RTP system that enables LTPS LCD and AMOLED manufacturers to produce poly-Si films at low cost, high throughput, and high yield. The system employs sequential heat treatment methods using temperature control and rapid thermal processor modules. The temperature control modules provide exceptionally uniform heating and cooling of the glass substrates to within ${\pm}2^a\;C$. The rapid thermal process that combines heating with field induction accelerates the treatment rates. The new FE-RTP system can process $730{\times}920mm$ glass substrates as thin as 0.4 mm. The uniform nature of poly-Si films produced by FE-RTP resulted in AMOLED panels with no laser-Muras. Furthermore, FE-RTP system also showed superior performances in other heat treatment processes involved in poly-Si TFT fabrications, such as dopant activation, gate oxide densification, hydrogenation, and pre-compaction.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.26-29
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• 1999

The I-V characteristics of the n-channel offset gated poly-Si TETs have been systematically investigated in order to analyse the effects of offset region. The on currents are reduced due to the series resistance by the offset length and there is no kink phenomenon in offset devices. The off currents of the offset gated TFTs are remarkably reduced to 10$^{-12}$ A independent of gate and drain voltage because the electric field is weakened by the increase of the depletion region width near the drain region. It is shown that the offset regions behave as a series resistance and reduce lateral and vertical electric field.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.80-81
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• 2008

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.