• Title/Summary/Keyword: pixel charging time

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Array Simulation Characteristics and TFT-LCD Pixel Design Optimization for Large Size, High Quality Display (대면적 고화질의 TFT-LCD 화소 설계 최적화 및 어레이 시뮬레이션 특성)

  • 이영삼;윤영준;정순신;최종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.11a
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    • pp.137-140
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    • 1998
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate si후미 distortion and pixel charging capability. which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio and level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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Charging and Feed-Though Characteristic Simulation of TFT-LCD by Applying Several Driving Method (구동 방법에 따른 TFT-LCD의 충전 및 Feed-Though 특성 시뮬레이션)

  • Park, Jae-Woo;Kim, Tae-Hyung;Noh, Won-Yoel;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 2000.11c
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    • pp.452-454
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    • 2000
  • In recent years, the Thin Film Transistor Liquid Crystal Display (TFT-LCD) is used in a variety of products as an interfacing device between human and them. Since TFT-LCDs have trend toward larger Panel sizes and higher spatial and/or gray-scale resolution, pixel charging characteristic is very important for the large panel size and high resolution TFT-LCD pixel characteristics. In this paper, both data line precharging method and line time extension (LiTEX) method is applied to Pixel Design Array Simulation Tool (PDAST) and the pixel charging characteristics of TFT-LCD array were simulated, which were compared with the results calculated by both PDAST In which the conventional device model of a-Si TFTs and gate step method is implemented.

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YFY-LCD Pixel Design for Large Size, High Quality using PDAST(Pixel Design Array Simulator) (화소 설계 어레이 시뮬레이터 (PDAST)를 이용한 대면적 고화질을 위한 TFT-LCD의 화소설계)

  • Lee, Young-Sam;Youn, Young-Jun;Jeong, Sun-Sin;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 1998.07d
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    • pp.1364-1366
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    • 1998
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay. pixel charging ratio, level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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Effects of Resistivity of Gate Line Material on TFT-LCD Pixel Operations (게이트 라인 물질의 저항률이 TFT-LCD 화소의 동작에 미치는 영향)

  • 이영삼;최종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.06a
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    • pp.321-324
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    • 1998
  • Pixel-Design Array Simulation Tool(PDAST) was used to profoundly the gate signal distortion and pixel changing capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio, level-shift of the pixel voltage were simulated with varying the resis5tivity of the gate line material. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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A new precharging method without side effects for liquid crystal displays with insufficient charging time

  • Lee, Seung-Hyuck;Kim, Jongbin;Lee, Seung-Woo
    • Journal of Information Display
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    • v.13 no.3
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    • pp.125-130
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    • 2012
  • In this paper, a new precharging method without any side effects is proposed to overcome image degradation caused by insufficient charging times. This work explains why the precharging method can compensate for short charging times. However, side effects of the precharging method in the form of horizontal line artifacts are addressed, wherein line artifact-compensating precharging (LCP) is presented to mitigate the side effects. Behavioral modeling is employed to investigate the side effects by estimating transient responses of a liquid crystal display. The LCP proves that it can dramatically reduce line artifacts caused by precharging because the brightness difference of adjacent pixels does not exceed 1.0.

Simulations of Pixel Characteristics for Large Size and High Qualify TFT-LCD using a new sophisticated Capacitance Formulas (새로운 정전용량 계산식물 이용한 대면적 .고화질 TFT-LCD의 화소 특성 시뮬레이션)

  • 윤영준;정순신;김태형;박재우;최종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.613-616
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    • 1999
  • An active-matrix LCD using thin film transistors (TFTs)has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the new set of capacitance models on the pixel operations can be effectively analyzed, The set of models which is adopted from VLSI interconnections calculate more precise capacitance. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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Data identified Time Extension Driving Method

  • Lin, L.;Liang, B.J.;Huang, C.M.;Chiang, S.P.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1247-1250
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    • 2006
  • A new liquid crystal display (LCD) Data identified Time Extension (DiTEX) driving scheme with a high charged voltage is proposed. The different charged voltage owing to the differential charging time and various initial pixel-potential can be eliminated or diminished under this method. It is compatible with a 2-row inversion and can be realized into the commercial dual-sided gate circuits.

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Effects of an Empirical Capacitance Models and Storage Capacitance Types on TFT-LCD Pixel Operations (실험적 정전용량 모델과 축적 용량 설계 방법에 따른 TFT-LCD 화소의 동작 특성)

  • Yun, Young-Jun;Jung, Soon-Shin;Park, Jae-Woo;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 1999.07d
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    • pp.1750-1752
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    • 1999
  • An active-matrix liquid crystal display (LCD) using thin film transistors (TFTs) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the sate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the new set of capacitance models on the pixel operations can be effectively analyzed. The set of models which is adopted from VLSI interconnections calculate more precise capacitance. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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Simulations of Effects of Common Electrode Voltage Distributions on Pixel Characteristics in TFT -LCD (TFT-LCD 공통 전극 전압 분포에 따른 화소 특성 시뮬레이션)

  • Kim, Tae-Hyung;Park, Jae-Woo;Kim, Jin-Hong;Choi, Jong-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04a
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    • pp.165-168
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    • 2000
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color fiat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. In addition, PDAST can estimate voltage distributions in common electrode which can affect pixel voltage and feed-through voltage. Since PDAST can simulate the gate, data and the pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of common electrode voltage can be effectively analyzed. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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High rate deposition of poly-si thin films using new magnetron sputtering source

  • Boo, Jin-Hyo;Park, Heon-Kyu;Nam, Kyung-Hoon;Han, Jeon-Geon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.186-186
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    • 2000
  • After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

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