• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.4
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• pp.11-20
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• 1994

The error rate equation of DS-CDMA/DQPSK skgnal adopting ARQ scheme has been derived in indoor radio channel which is characterized by AWGN, multi-user interference (MUI) and Rician fading, Using the derived equation the error performance has been evaluated and shown in figures as a function of direct to diffuse signal power ratio(KS1rT), the number of active users (K), PN code sequence length (N), the number of parity bit of linear code (b), forward channel BER, and ES1bT/NS1OT. From the results it is known that in severe fading environments (KS1rT=6) the performance of DS-CDMA/DQPSK system is not reliable so it is needed to adopt techniques for improvement. When an ARQ scheme is adopted, as a method for improving error performance, the performance improves compared with that of non-ARQ scheme and the degree of improvement is proportional to the number of parity bits of linear code. As increasing the number of parity bits, system performance is improved vut system throughput efficiency must be considered. In severe fading channel Hybrid ARQ scheme is more effective than ARQ scheme. As a result, ARQ scheme is appropriate for the high-reliability data communication systems over the radio channel in which the real time processing is not required.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.4C
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• pp.310-317
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• 2006

In this paper, we propose a new sequential message-passing decoding algorithm of low-density parity-check (LDPC) codes by partitioning check nodes. This new decoding algorithm shows better bit error rate(BER) performance than that of the conventional message-passing decoding algorithm, especially for small number of iterations. Analytical results tell us that as the number of partitioned subsets of check nodes increases, the BER performance becomes better. We also derive the recursive equations for mean values of messages at variable nodes by using density evolution with Gaussian approximation. Simulation results also confirm the analytical results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.1
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• pp.8-14
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• 2013

A low density parity check (LDPC) decoder provides a most powerful error control capability for mobile communication devices and storage systems, due to its performance being close to Shannon's limit. In this paper, we introduce an efficient overlapped LDPC decoding algorithm using a upper dual-diagonal parity check matrix structure. By means of this algorithm, the LDPC decoder can concurrently execute parts of the check node update and variable node update in the sum-product algorithm. In this way, we can reduce the number of clock cycles per iteration as well as reduce the total latency. The proposed decoding structure offers a very simple control and is very flexible in terms of the variable bit length and variable code rate. The experiment results show that the proposed decoder can complete the decoding of codewords within 70% of the number of clock cycles required for a conventional non-overlapped decoder. The proposed design also reduces the power consumption by 33% when compared to the non-overlapped design.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38C no.2
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• pp.196-201
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• 2013

In this paper, we proposed high speed LDPC encoder architecture for DVB-S2 standard. In conventional algorithm, the processes of parity calculations are serial fashion. Therefore conventional algorithm need clocks of number of parity. The proposed LDPC encoding architecture is based on a parallel 360 bits-wise operations. The key issues for realizing high speed are using the two kinds of index addresses and make use of memories efficiently. We implemented a half rate LDPC encoder on an FPGA, and confirmed its maximum throughput is up to 10 Gbps on 100MHz clock.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.9
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• pp.3458-3481
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• 2021

Existing methods for blind identification of linear block codes without a candidate set are mainly built on the Gauss elimination process. However, the fault tolerance will fall short when the intercepted bit error rate (BER) is too high. To address this issue, we apply the reverse algebra approach and propose a novel "two-step-screening" algorithm by solving the linear error equations on the binary Galois field, or GF(2). In the first step, a recursive matrix partition is implemented to solve the system linear error equations where the coefficient matrix is constructed by the full codewords which come from the intercepted noisy bitstream. This process is repeated to derive all those possible parity-checks. In the second step, a check matrix constructed by the intercepted codewords is applied to find the correct parity-checks out of all possible parity-checks solutions. This novel "two-step-screening" algorithm can be used in different codes like Hamming codes, BCH codes, LDPC codes, and quasi-cyclic LDPC codes. The simulation results have shown that it can highly improve the fault tolerance ability compared to the existing Gauss elimination process-based algorithms.

• The Journal of the Korea Contents Association
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• v.12 no.4
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• pp.31-39
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• 2012

DVC(Distributed Video Coding) techniques have been attracting a lot of research works since these enable us to implement the light-weight video encoder and to provide good coding efficiency by introducing the feedback channel. However, the feedback channel causes the decoder to increase the decoding complexity and requires very high decoding latency because of numerous iterative decoding processes. So, in order to reduce the decoding delay and then to implement in a real-time environment, this paper proposes several parity bit estimation methods which are based on the temporal correlation, spatial correlation and spatio-temporal correlations between LDPCA frames on each bit plane in the consecutive video frames in pixel-domain Wyner-Ziv video coding scheme and then the performances of these methods are compared in fast DVC scheme. Through computer simulations, it is shown that the adaptive spatio-temporal correlation-based estimation method and the temporal correlation-based estimation method outperform others for the video frames with the highly active contents and the low active contents, respectively. By using these results, the proposed estimation schemes will be able to be effectively used in a variety of different applications.

• Journal of the Korean Institute of Intelligent Systems
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• v.11 no.5
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• pp.406-412
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• 2001

In this paper, a new fuzzy single layer learning algorithm is proposed, which shows improved learning time and convergence property than that of the conventional fuzzy single layer perceptron algorithms. First, we investigate the structure of physiological neurons of the nervous system and propose new neuron structures based on fuzzy logic. And by using the proposed fuzzy neuron structures, the model and learning algorithm of Physiological Fuzzy Single Layer Perceptron(P-FSLP) are proposed. For the evaluation of performance of the P-FSLP algorithm, we applied the conventional fuzzy single layer perceptron algorithms and the P-FSLP algorithm to three experiments including Exclusive OR problem, the 3-bit parity bit problem and the recognition of car licence plates, which is an application of image recognition, and evaluated the performance of the algorithms. The experimentation results showed that the proposed P-FSLP algorithm reduces the possibility of local minima more than the conventional fuzzy single layer perceptrons do, and enhances the time and convergence for learning. Furthermore, we found that the P-FSLP algorithm has the great capability for image recognition applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7C
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• pp.611-617
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• 2010

In this paper, we investigate the performances of the serial concatenated convolutional codes (SCCC) and low-density parity-check (LDPC) codes on perpendicular magnetic recording (PMR) channels. We discuss the performance of two systems when user bit-densities are 1.7, 2.0, 2.4 and 2.8, respectively. The SCCC system is less complex than LDPC system. The SCCC system consists of recursive systematic convolutional (RSC) codes encoder/decoder, precoder and random interleaver. The decoding algorithm of the SCCC system is the soft message-passing algorithm and the decoding algorithm of the LDPC system is the log domain sum-product algorithm (SPA). When we apply the iterative decoding between channel detector and the error control codes (ECC) decoder, the SCCC system is compatible with the LDPC system even at the high user bit density.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.6B
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• pp.948-953
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• 2010

In this paper, we propose multi-bit soft error detection method which can use an instruction cache of superscalar CPU architecture. Proposed method is applied to high-speed static RAM for instruction cache. Using 1D parity and interleaving, it has less memory overhead and detects more multi-bit errors comparing with other methods. It only detects occurrence of soft errors in static RAM. Error correction is treated like a cache miss situation. When soft errors are occurred, it is detected by 1D parity. Instruction cache just fetch the words from lower-level memory to correct errors. This method can detect multi-bit errors in maximum 4$\times$4 window.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.55-58
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• 2004

This this paper, we propose vertical Bell laboratories layered space time (V-BLAST) system based on variable rate Low-Density Parity Check (LDPC) codes to improve performance of receiver when QR decomposition interference suppression combined with interference cancellation is used over independent Rayleigh fading channel. The different rate LDPC codes can be made by puncturing some rows of a given parity check matrix. This allows to implement a single encoder and decoder for different rate LDPC codes. The performance can be improved by assigning stronger LDPC codes in lower layer than upper layer because the poor SNR of first detected data streams makes error propagation. Keeping the same overall code rates, the V-BLAST system with different rate LDPC codes has the better performance (in terms of Bit Error Rate) than with constant rate LDPC code in fast fading channel.