• Journal of the Korean Institute of Telematics and Electronics
• /
• v.23 no.3
• /
• pp.370-375
• /
• 1986

In this paper, modeling of the conduction mechanism of ion implanted p-type polycrystalline silicon is studied. From this modeling, the resistivity of p-type polycrystalline and its dependence on dopant concentration are calculated. The proposed modeling whose grain size is about 1450 \ulcorneris shwon to agree well with the experimental result.

• Journal of the Korean Solar Energy Society
• /
• v.38 no.1
• /
• pp.37-44
• /
• 2018

Solar panels are modules made up of many cells, like the N-type monosilicon, P-type monosilicon, P-type multisilicon, amorphous thin-film silicon, and CIGS solar cells. An efficient photovoltaic (PV) power is important to use to determine what kind of cell types are used because residential solar systems receive attention. In this study, we used 3-type solar panels - such as N-type monosilicon, P-type monosilicon, and CIGS solar cells - to investigate what kind of solar panel on a house or building performs the best. PV systems were composed of 3-type solar panels on the roof with each ~1.8 kW nominal power. N-type monosilicon solar panel resulted in the best power generation when monitored. Capacity Utilization Factor (CUF) and Performance Ratio (PR) of the N-type Si solar panel were 14.6% and 75% respectively. In comparison, N-type monosilicon and CIGS solar panels showed higher performance in power generation than P-type monosilicon solar power with increasing solar irradiance.

• 전기의세계
• /
• v.22 no.5
• /
• pp.5-11
• /
• 1973

A new method of forming silicon p$^{+}$-n-n$^{+}$ junctions has been attempted by using the VDH-Implanter (Vacuum Discharge and Heating). Each of p$^{+}$-n and n-n$^{+}$ junctions was formed on both sides of an n-type silicon substrate by means of predeposition of each dopant and their bombarding due to rarefied air ions together with the preheating of the substrate in the implanter. The recifying principle of the p$^{+}$-n-n$^{+}$ junctions is thought to be based on the theory of double injection. The I-V characteristic of the diode has shown that it has a fairly high forward current density with the desirable rise due to vary low voltage though the reverse voltage is a little low on account of the low resistivity of the silicon substrate.n substrate.

• Journal of the Korean Ceramic Society
• /
• v.39 no.6
• /
• pp.594-597
• /
• 2002

Silicon Oxynitride(SiON) thick films on p-type silicon(100) wafers have obtained by using plasma-enhanced chemical vapor deposition from SiH$_4$ , N$_2$O and N$_2$. Prism coupler measurements show that the refractive indices of SiON layers range from 1.4620 to 1.5312. A high deposition power of 180 W leads to deposition rates of up to 5.92${\mu}$m/h. The influence of the deposition condition on the chemical composition was investigated using X-ray photoelectron spectroscopy. After deposition of the SiON thick films, the films were annealed at 1050$^{\circ}C$ in a nitrogen atmosphere for 2 h to remove absorption band near 1.5${\mu}$m.

• Proceedings of the Korea Association of Crystal Growth Conference
• /
• 1996.06a
• /
• pp.494-496
• /
• 1996

The purpose of this study is to investigate the effect of process conditions on pore distribution in porous silicon layer prepared by electrochemical reaction. Porous silicon layers formed on p-type silicon wafer show the network structure of fine porse whose diameters are less than 100${\AA}$. In n-type porous silicon, selective growth was found on the pore surface by wet etching process after PR patterning. And numerical method showed high current density on the pore tip. With this result we confirmed that pore formation has two steps. First step is the initial attack on the surface and second step is the directional growth on the pore tip.

• Current Photovoltaic Research
• /
• v.7 no.1
• /
• pp.15-20
• /
• 2019

Most high-efficiency n-type silicon solar cells are based on the high quality surface passivation and ohmic contact between the emitter and the metal. Currently, various metalization methods such as screen printing using metal paste and physical vapor deposition are being used in forming electrodes of n-type silicon solar cell. In this paper, we analyzed the degradation factors induced by the front electrode formation process using e-beam evaporation of double passivation structure of p-type emitter and $Al_2O_3/SiN_x$ for high efficiency solar cell using n-type bulk silicon. In order to confirm the cause of the degradation, the passivation characteristics of each electrode region were determined through a quasi-steady-state photo-conductance (QSSPC).

• 한국신재생에너지학회:학술대회논문집
• /
• 2010.06a
• /
• pp.76.1-76.1
• /
• 2010

Furnace를 이용한 $POCl_3$ 확산 공정은 실리콘 태양전지 제작과정에서 일반적으로 이용되는 에미터 층 형성 공정이다. 하지만, 확산 공정을 통해 P-N Junction을 형성할 경우 전면과 후면의 contact현상이 발생하게 되고 이를 제거하기 위해 Edge isolation 공정을 거치게 된다. 최근에는 레이저로 V 모양의 홈을 형성하는 방법이 이용되고 있다. 본 연구에서는 p-type 실리콘 웨이퍼 기판에 insulating barrier를 형성하여 edge isolation 공정을 없앤 Non-edge isolation공정을 제시한다. Non p-type 실리콘 웨이퍼에 insulating barrier를 형성한다. Insulating barrier가 형성된 BOE용액과 KOH에서의 견딤성 실험을 진행 하였다. 이후, p-type 단결정 실리콘 태양전지의 확산 공정을 진행하여 Non edge isolation 공정을 진행한 경우와 laser를 이용한 edge isolation 공정을 진행한 태양전지를 제작하여 특성을 비교하였다.

• 한국신재생에너지학회:학술대회논문집
• /
• 2005.06a
• /
• pp.168-171
• /
• 2005

Thickness optimization of heavily doped p-type seeding layer was studied to improve performance of thin film silicon solar cell. We used liquid phase epitaxy (LPE) to grow active layer of $25{\MU}m$ thickness on p+ seeding layer. The cells with p+ seeding layer of $10{\mu}m\;to\;50{\mu}m$ thickness were fabricated. The highest efficiency of a cell is $12.95\%$, with Voc=633mV, $Jsc=26.5mA/cm^2,\;FF=77.15\%$. The $P^+$ seeding layer of the cell is $20{\mu}m$, thick. As thicker seeding layer than $20{\mu}m$, the performance of the cell was degraded. The results demonstrate that the part of the recombination current is due to the heavily doped seeding layer. Thickness of heavily doped p-type seeding layer was optimized to $20{\mu}m$. The performance of solar cell is expected to improve with the incorporation of light trapping as texturing and AR coating.

• Journal of Satellite, Information and Communications
• /
• v.8 no.4
• /
• pp.124-129
• /
• 2013

An electrostatic discharge (ESD) protection device, so called, N-type SCR with P-type MOSFET pass structure (NSCR_PPS), was analyzed for high voltage I/O applications. A conventional NSCR_PPS device shows typical SCR-like characteristics with extremely low snapback holding voltage, which may cause latch-up problem during normal operation. However, a modified NSCR_PPS device with counter pocket source(CPS) and partial p-type well(PPW) structure demonstrates highly latch-up immune current-voltage characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.418-418
• /
• 2008

The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.