• Journal of IKEEE
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• v.22 no.1
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• pp.205-208
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• 2018

In this work, we performed reverse- and forward-gate bias stress tests on normally-off AlGaN/GaN high electron mobility transistors(HEMTs) with p-AlGaN-gate for reliability assessment. Inverse piezoelectric effect, commonly observed in Schottky-gate AlGaN/GaN HEMTs during reverse bias stress, was not observed in p-AlGaN-gate AlGaN/GaN HEMTs. Forward gate bias stress tests revealed distinct degradation of p-AlGaN-gate devices exhibiting sudden increase of gate leakage current. We suggest that forward gate bias stress tests should be performed to define the failure criteria and assess the reliability of normally off p-AlGaN-gate GaN HEMTs.

• Journal of IKEEE
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• v.24 no.4
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• pp.1167-1171
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• 2020

In this work, we proposed a graded gate-doping structure to alleviate an electric field in p-GaN gate layer in order to improve the reliability of normally-off GaN power devices. In a TCAD simulation by Silvaco Atlas, a distribution of the graded p-type doping concentration was optimized to have a threshold voltage and an output current characteristics as same as the reference device with a uniform p-type gate doping. The reduction of an maximum electric field in p-GaN gate layer was observed and it suggests that the gate reliability of p-GaN gate HFETs can be improved.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.2
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• pp.321-324
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• 2020

In this work, we developed a selective etching process for GaN that is a key process in p-GaN/AlGaN/GaN enhancement-mode (E-mode) power switching field-effect transistor (FET) fabrication. In order to achieve a high current density of p-GaN/AlGaN/GaN E-mode FET, the p-GaN layer beside the gate region must be selectively etched whereas the underneath AlGaN layer should be maintained. A selective etching process was implemented by oxidizing the surface of the AlGaN layer and the GaN layer by adding O2 gas to Cl2/N2 gas which is generally used for GaN etching. A selective etching process was optimized using Cl2/N2/O2 gas mixture and a high selectivity of 53:1 (= GaN/AlGaN) was achieved.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.9
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• pp.1351-1358
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• 2017

In this work, we investigated radiation hardness of GaN-based transistors which are strong candidates for next-generation power electronics. Field effect transistors with three types of gate structures including metal Schottky gate, recessed gate, and p-AlGaN layer gate were fabricated on AlGaN/GaN heterostructure on Si substrate. The devices were irradiated with energetic protons and alpha-particles. The irradiated transistors exhibited the reduction of on-current and the shift of threshold voltage which were attributed to displacement damage by incident energetic particles at high fluence. However, FET operation was still maintained and leakage characteristics were not degraded, suggesting that GaN-based FETs possess high potential for radiation-hardened electronics.

• Journal of IKEEE
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• v.11 no.4
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• pp.152-157
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• 2007

AlGaN/GaN high electron mobility transistors (HEMTs) were fabricated and the effect of ${N_2}O$ plasma on the electrical characteristics of the devices was investigated. The HEMT exposed to ${N_2}O$ plasma formed by 40 W of RF power in a chamber with pressure of 20 mTorr at a temperature of $200^{\circ}C$, exhibited a reduction of gate leakage current from 246 nA to 1.2 pA by 10 seconds treatment. The current between the two isolated active regions reduced from 3 uA to 7 nA and the sheet resistance of the active layer was lowered also. The variations of electrical characteristics for HEMT were occurred within a short time expose of 10 seconds and the successive expose did not influence on the improvements of gate leakage characteristics and conductivity of the active region. The reduced leakage current level was not varied by successive $SiO_2$ deposition and its removal. The transconductnace and drain current of AlGaN/GaN HEMTs were increased also by the expose to the ${N_2}O$ plasma.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.1
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• pp.13-20
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• 2003

Both MgO and $Sc_2O_3$ are shown to provide low interface state densities (in the $10^{11}{\;}eV^{-1}{\;}cm{\;}^{-2}$ range)on n-and p-GaN, making them useful for gate dielectrics for metal-oxide semiconductor(MOS) devices and also as surface passivation layers to mitigate current collapse in GaN/AlGaN high electron mobility transistors(HEMTs).Clear evidence of inversion has been demonstrated in gate-controlled MOS p-GaN diodes using both types of oxide. Charge pumping measurements on diodes undergoing a high temperature implant activation anneal show a total surface state density of $~3{\;}{\times}{\;}10^{12}{\;}cm^{-2}$. On HEMT structures, both oxides provide effective passivation of surface states and these devices show improved output power. The MgO/GaN structures are also found to be quite radiation-resistant, making them attractive for satellite and terrestrial communication systems requiring a high tolerance to high energy(40MeV) protons.

• Journal of the Semiconductor & Display Technology
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• v.12 no.3
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• pp.23-27
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• 2013

This paper is for enhancing the breakdown voltage of MHEMTs with an InP-etchstop layer. Gate-recess structures has been simulated and analyzed for the breakdown of the devices with the InP-etchstop layer. The fully removed recess structure in the drain side of MHEMT shows that the breakdown voltage enhances from 2V to almost 4V and that the saturation current at gate voltage of 0V is reduced from 90mA to 60mA at drain voltage of 2V. This is because the electron-captured negatively fixed charges at the drain-side interface between the InAlAs barrier layer and the $Si_3N_4$ passivation layer deplete the InGaAs channel layer more and thus decreases the electron current passing the channel layer. In the paper, the fully-recessed asymmetric gate-recess structure at the drain side shows the on-breakdown voltage enhancement from 2V to 4V in the MHEMTs.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.17-20
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• 2000

We have enhanced the yield of 0.25 ${\mu}{\textrm}{m}$ T-gate $Al_{0.25}$G $a_{0.75}$As/I $n_{0.2}$G $a_{0.8}$As P-HEMT using three-layer E-beam lithography process and selective etching process. The three-layer resist structure (PMMA/copolymer/ PMMA=2000 $\AA$/3000 $\AA$/2000 $\AA$) and three developers (Benzene：IPA=1：1,Methanol：IPA =1：1,MIBK：IPA=1：3) were used for fabrication of a wide-head T-gate by the conventional double E-beam exposure technology. Also 1 wt% citric acid： $H_2O$$_2$：N $H_{4}$OH(200m1：4ml：2.2ml) solution were used for uniform gate recess. The etching selectivity of GaAs over $Al_{0.25}$G $a_{0.75}$As is measured to be 80. So these P-HEMT processes can be used in X-band MMIC LNA fabrication.ion.ion.ion.

• Electrical & Electronic Materials
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• v.12 no.8
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• pp.39-45
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• 1999

Comparative photoresponsive current-volt-age characteristics of n-channel PHEMT and MESFET on GaAs substrate. with (W/L)=200${\mu}{\textrm}{m}$/1${\mu}{\textrm}{m}$ of gates, are reported as a function of electro-optical stimulation (P\ulcorner, λ=830nm) for the first time as far as we know. Significantly different photoresponses are observed in MESFET and PHEMT, mainly due to different optoelectronic mechanisms in the formation and current conduction of channel carriers. Under high optical power, high photoresponsity with a strong non-linearity with P\ulcorner, predominantly due to a parallel conduction via a heavily doped Al\ulcornerGa\ulcornerAs donor layer, was observed in PHEMT while the optically induced drain current has been very small but monotonically increasing with optical stimulation in GaAs MESFET. We also investigated differences in optically stimulated gate leakage currents and photonic gate responses on gate voltage and drain voltage as a function of P\ulcorner. Based on the drain and gate responses to electro-optical stimulation. PHEMTs are expected to be a better candidate for high performance photonically responsive microwave device compared with MESFETs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.117-123
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• 2004

A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.