• Title/Summary/Keyword: oxide layer thickness

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Electrical and Luminescent Properties of OLEDs by Nickel Oxide Buffer Layer with Controlled Thickness (NiO 완충층 두께 조절에 의한 OLEDs 전기-광학적 특성)

  • Choi, Gyu-Chae;Chung, Kook-Chae;Kim, Young-Kuk;Cho, Young-Sang;Choi, Chul-Jin;Kim, Yang-Do
    • Korean Journal of Metals and Materials
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    • v.49 no.10
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    • pp.811-817
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    • 2011
  • In this study, we have investigated the role of a metal oxide hole injection layer (HIL) between an Indium Tin Oxide (ITO) electrode and an organic hole transporting layer (HTL) in organic light emitting diodes (OLEDs). Nickel Oxide films were deposited at different deposition times of 0 to 60 seconds, thus leading to a thickness from 0 to 15 nm on ITO/glass substrates. To study the influence of NiO film thickness on the properties of OLEDs, the relationships between NiO/ITO morphology and surface properties have been studied by UV-visible spectroscopy measurements and AFM microscopy. The dependences of the I-V-L properties on the thickness of the NiO layers were examined. Comparing these with devices without an NiO buffer layer, turn-on voltage and luminance have been obviously improved by using the NiO buffer layer with a thickness smaller than 10 nm in OLEDs. Moreover, the efficiency of the device ITO/NiO (< 5 nm)/NPB/$Alq_3$/ LiF/Al has increased two times at the same operation voltage (8V). Insertion of a thin NiO layer between the ITO and HTL enhances the hole injection, which can increase the device efficiency and decrease the turn-on voltage, while also decreasing the interface roughness.

Effect of Ag Formation Mechanism on the Change of Optical Properties of SiInZnO/Ag/SiInZnO Multilayer Thin Films (SiInZnO/Ag/SiInZnO 다층박막의 Ag 형성 메카니즘에 따른 광학적 특성 변화)

  • Lee, Young Seon;Lee, Sang Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.5
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    • pp.347-350
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    • 2013
  • By inserting a very thin metal layer of Ag between two outer oxide layers of amorphous silicon indium zinc oxide (SIZO), we fabricated a highly transparent SIZO/Ag/SIZO multilayer on a glass substrate. In order to find the optimized thickness of Ag layers, we investigated the variation of optical properties depending on Ag thickness. It was found that the transition of Ag layer from island formation to a continuous film occurred at a critical thickness. Continuity of the Ag film is very important for optical properties in SIZO/Ag/SIZO multilayer. With about 15 nm thick Ag layer, the multilayer showed a high optical transmittance of 80% at 550 nm and low emissivity in IR.

Dependence of the Heterojunction Diode Characteristics of ZnO/ZnO/p-Si(111) on the Buffer Layer Thickness (버퍼막 두께에 따른 ZnO/ZnO/p-Si(111) 이종접합 다이오드 특성 평가)

  • Heo, Joo-Hoe;Ryu, Hyuk-Hyun;Lee, Jong-Hoon
    • Korean Journal of Materials Research
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    • v.21 no.1
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    • pp.34-38
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    • 2011
  • In this study, the effects of an annealed buffer layer with different thickness on heterojunction diodes based on the ZnO/ZnO/p-Si(111) systems were reported. The effects of an annealed buffer layer with different thickness on the structural, optical, and electrical properties of zinc oxide (ZnO) films on p-Si(111) were also studied. Before zinc oxide (ZnO) deposition, different thicknesses of ZnO buffer layer, 10 nm, 30 nm, 50 nm and 70 nm, were grown on p-Si(111) substrates using a radio-frequency sputtering system; samples were subsequently annealed at $700^{\circ}C$ for 10 minutes in $N_2$ in a horizontal thermal furnace. Zinc oxide (ZnO) films with a width of 280nm were also deposited using a radio-frequency sputtering system on the annealed ZnO/p-Si (111) substrates at room temperature; samples were subsequently annealed at $700^{\circ}C$ for 30 minutes in $N_2$. In this experiment, the structural and optical properties of ZnO thin films were studied by XRD (X-ray diffraction), and room temperature PL (photoluminescence) measurements, respectively. Current-voltage (I-V) characteristics were measured with a semiconductor parameter analyzer. The thermal tensile stress was found to decrease with increasing buffer layer thickness. Among the ZnO/ZnO/p-Si(111) diodes fabricated in this study, the sample that was formed with the condition of a 50 nm thick ZnO buffer layer showed a strong c-axis preferred orientation and I-V characteristics suitable for a heterojunction diode.

Effect of Channel Scaling on Zinc Oxide Thin-Film Transistor Prepared by Atomic Layer Deposition

  • Choi, Woon-Seop
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.6
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    • pp.253-256
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    • 2010
  • Different active layer thicknesses for zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric using injector type atomic layer deposition. The properties of the ZnO TFTs were influenced by the active thickness and width-to-length (W/L) ratio of the device. The threshold voltage of ZnO TFTs shifted positively as the active layer thickness decreased, while the subthreshold slope decreased. The W/L ratio of ZnO TFTs also affected the mobility and subthreshold slope. An optimized TFT structure exhibited an on-tooff current ratio of above 106 with solid saturation.

Electrical Properties of the Transparent Conducting Oxide Layers of Al-doped ZnO and WO3 Prepared by rf Sputtering Process

  • Gang, Dong-Su;Kim, Hui-Seong;Lee, Bung-Ju;Sin, Baek-Gyun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.316-316
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    • 2014
  • Two different transparent conducting oxide (TCO) layers of Al-doped ZnO (AZO) and $WO_3$ were prepared by a rf sputtering process. Working pressure, deposition time, and target-to-substrate distance were varied for the sputtering process to improve electrical properties of the resulting layer. Thickness of the TCO layers was measured by a profile meter of ${\alpha}$-step. To evaluate the electrical conductivity, surface resistivity of the TCO layers was measured by a four-point probe technique. Decrease of the working pressure resulted in increase of deposition rate and decrease of surface resistivity of the resulting layer. Increase of the layer thickness due to increased deposition time resulted in decrease of surface resistivity of the resulting layer. The shorter the target-to-substrate distance was, the lower was the surface resistivity of the resulting layer.

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The Schottky Diode of Optimal Stepped Oxide Layer for High Breakdown Voltage (높은 항복전압을 위한 최적 계단산화막의 쇼트키 다이오드)

  • Lee, Yong Jae;Lee, Moon Key;Kim, Bong Ryul
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.4
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    • pp.484-489
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    • 1986
  • A device with variable stepped oxide layer along the edge region of Schottky junction have been designed and fabricated. The effect of this stepped oxide layer in the edge region improves the breakdown voltage as a result of the by increase of the depletion layer width, and decreases the leakage current as compared to the effect of conventional field oxide layer, when the reverse voltage was applied. Experimental results shown that the Schottky diode with the the reverse voltage was applied. Experimenal results show that the Schottky diode with the optimal stepped oxide layer maintains nearly ideal I-V characteristics and excellent breakdown voltage(170V) by reducing the edge effect inherent in metal-semiconductor contacts. The optimal conditions of stepped oxide layer are 1700\ulcornerin thickness and 10\ulcorner in length.

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A Study on the Fluxless Bonding of Si-wafer/Solder/Glass Substrate (Si 웨이퍼/솔더/유리기판의 무플럭스 접합에 관한 연구)

  • ;;;N.N. Ekere
    • Journal of Welding and Joining
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    • v.19 no.3
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    • pp.305-310
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    • 2001
  • UBM-coated Si-wafer was fluxlessly soldered with glass substrate in $N_2$ atmosphere using plasma cleaning method. The bulk Sn-37wt.%Pb solder was rolled to the sheet of $100\mu\textrm{m}$ thickness in order to bond a solder disk by fluxless 1st reflow process. The oxide layer on the solder surface was analysed by AES(Auger Electron Spectroscopy). Through rolling, the oxide layer on the solder surface became thin, and it was possible to bond a solder disk on the Si-wafer with fluxless process in $N_2$ gas. The Si-wafer with a solder disk was plasma-cleaned in order to remove oxide layer formed during 1st reflow and soldered to glass by 2nd reflow process without flux in $N_2$ atmosphere. The thickness of oxide layer decreased with increasing plasma power and cleaning time. The optimum plasma cleaning condition for soldering was 500W 12min. The joint was sound and the thicknesses of intermetallic compounds were less than $1\mu\textrm{m}$.

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A Study on the Oxidation Resistance of Aluminum Cast Iron by Aluminum Content (알루미늄 함량에 따른 알루미늄 주철의 내산화성에 관한 연구)

  • Kim, Dong-Hyuk
    • Journal of Korea Foundry Society
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    • v.40 no.6
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    • pp.135-145
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    • 2020
  • Aluminum cast iron has excellent oxidation resistance, sulfurization resistance, and corrosion resistance. However, the ductility at room temperature is insufficient, and at temperatures above 600?, the strength drops sharply and practicality is limited. In the case of heat-resistant cast iron, high-temperature materials containing Cr and Ni account for 30 to 50% or more. However, these high-temperature materials are expensive. Aluminum heat-resistant cast iron is considered as a substitute for expensive heat-resistant materials. Oxidation due to the aging temperature and holding time conditions increases more in 0 wt.% Al-cast iron than in 2 and 4 wt.% Al-cast iron according to oxidized weight and gravimetric oxide layer thickness measurements. As a result of observing the cross-section of the oxide layer, it was found to contain 0 wt.% of Al-cast iron silicon oxide-containing SiO2 or Fe2SiO4 oxide film. In cast iron containing aluminum, the thickness of the internal oxide layer due to aluminum increases as the aging temperature and retention time increase, and the amount of the iron oxide layer generated on the surface decreases.

The Effect of Oxide Layer Thickness to the Scale Defects Generation during Hot finish Rolling (열연사상 압연시 스케일 결함발생에 미치는 산화피막 두께의 영향)

  • 민경준
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 1999.08a
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    • pp.412-422
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    • 1999
  • Scale defects generated on the strip surface in a tandem finishing mill line are collected from the strip trapped among the production mills by freezing the growing scale on the strip by the melt glass coating and shutting down the line simultaneously. The samples observed of its cross sectional figure showed the process of scale defect formation where the defects are formed at the base metal surface by thicker oxidized scale during each rolling passes. The properties of the oxidized layer growth both at rolling and inter-rolling are detected down sized rolling test simulating carefully the rolling condition of the production line. The thickness of the oxidized layer at each rolling pass are simulated numerically. The critical scale thickness to avoid the defect formation is determined through the expression of mutual relation between oxidized layer thickness and the lanks of the strip called quality for the scale defects. The scale growth of scale less than the critical thickness and also to keep the bulk temperature tuning the water flow rate and cooling time appropriately. Two units of Inerstand Cooler are designed and settled among the first three stands in the production line. Two units of scale defect is counted from the recoiled strip and the results showed distinct decrease of the defects comparing to the conventionaly rolled products.

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Characteristics and Formation of Thermal Oxidative Film Silicon Carbide for MOS Devices (MOS 소자용 Silicon Carbide의 열산화막 생성 및 특징)

  • O, Gyeong-Yeong;Lee, Gye-Hong;Lee, Gye-Hong;Jang, Seong-Ju
    • Korean Journal of Materials Research
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    • v.12 no.5
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    • pp.327-333
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    • 2002
  • In order to obtain the oxidation layer for SiC MOS, the oxide layers by thermal oxidation process with dry and wet method were deposited and characterized. Deposition temperature for oxidation layer was $1100^{\circ}C$~130$0^{\circ}C$ by $O_2$ and Ar atmosphere. The oxide thickness, surface morphology, and interface characteristic of deposited oxide layers were measurement by ellipsometer, SEM, TEM, AFM, and SIMS. Thickness of oxidation layer was confirmed 50nm and 90nm to with deposition temperature at $1150^{\circ}C$ and $1200{\circ}C$ for dry 4 hours and wet 1 hour, respectively. For the high purity oxidation layer, the necessity of sacrificial oxidation which is etched for the removal of the defeats on the wafer after quickly thermal oxidation was confirmed.