• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.8
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• pp.99-103
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• 2004

Aperture has been employed on the ground plane in the Hairpin resonator. Aperture made by etching the part of the ground effected coupling coefficient and then quality factor of Hairpin resonator has been increased. When the hair pin oscillator using aperture has been compared with the conventional hair pin oscillator using microstrip, it has been improved the phase noise about 19dBc ＠100KHz. Oscillation frequency of the hair pin oscillator using aperture has been 5.83GHz band and output power is -4.33dBm.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.28-32
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• 2003

Aperture has been employed on the ground plane in the Hair Pin resonator. Aperture made by etching the part of the ground effected coupling coefficient and then quality factor of Hair Pin resonator has been increased. When the hair pin oscillator using aperture has been compared with the conventional hair pin oscillator using microstrip, it has been improved the phase noise about 19dBc @100KHz. Oscillation frequency of the hair pin oscillator using aperture has been 5.83GHz band and output power is -4.33dBm.

• ETRI Journal
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• v.34 no.4
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• pp.518-526
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• 2012

This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.

• 한국초전도학회:학술대회논문집
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• v.12
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• pp.47-47
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• 2002

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.98-104
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• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

• Proceedings of the Optical Society of Korea Conference
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• 1990.02a
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• pp.242-247
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• 1990

By self-homodyne method we measured the relative phase fluctuation of a light wave. Balanced detection system can eliminate local oscillator excess noise and multiport detection makes it possible ot measure the phase change of the signal beam. Deriving the SB(Signal Beam) and the LO(Local Oscillator) from the same laser source, we find the SB maintain constant phase relative to that of the LO. We have introduced a phase fluctuation in the SB by modulating the beam path of the SB. The measured phase fluctuation agreed well with the predicted one, thereby we confirmed the reliability of our system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.8
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• pp.1713-1718
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• 2004

It has been known that 1/f noise of MOSFET is generated by the superposition of single random telelgraph signals (RTS). In this study, jitters caused by 1/f noise of MOSFET are analysed with RTS supplied to all of the nodes of the CMOS ring oscillator under investigation. Through the analysis of the variations of jitters and jitter ratios with varying values of the amplitude of RTS, it is found that the jitters and the jitter ratios are proportional to the amplitude of RTS. And the analysis of FFT of the outputs of the ring oscillator reveals that the jitters are closely related to the phase noise of the high order harmonics of the ring oscillator outputs.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.947-954
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• 1999

A new low phase noise Dielectric Resonator Parallel Feedback Oscillator(DRPFO) that is proposed in this paper has a simple structure so that it can be fabricated in low cost and with high performance. The proposed DRPFO is in a feedback loop oscillator configuration, which is composed of a low noise amplifier, a power amplifier, a power attenuator, a power divider and a parallel resonator feedback element that consists of a dielectric resonator coupled with two microstrip lines. The measured phase noise of DRPFO was less than -81 dBc/Hz at offset frequency 1 kHz of 10.75 GHz carrier frequency, and the frequency stability of DRPFO was less than $\pm$200 kHz over the temperature range of -40$^{\circ}$C to +60$^{\circ}$C.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.787-792
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• 2004

This paper shows the design, fabrication and performance of oscillator appled to 5.5GHz RF module for local wireless communication system. Super low noise HJ FET of NE3210S01 is used to obtain a good phase noise Performance. The design Parameters for the optimum operating performance are simulated with ADS simulation. The measured out Power is 10 dBm at 5.5GHz, the second harmonic suppression -31 dBc, and the phase noise characteristics -98.83 dBc at 100kHz offset frequency, respectively. This implemented oscillator is available to local wireless Communication system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.96-100
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• 2004

This paper shows the design, fabrication and performance of oscillator appled to 5.5GHz RF module for local wireless communication system. Super low noise HJ FET of NE3210S01 is used to obtain a good phase noise Performance. The design Parameters for the optimum operating performance are simulated with ADS simulation. The measured out Power is 10 ㏈m at 5.5GHz, the second harmonic suppression -31 ㏈c, and the phase noise characteristics -98.83 ㏈c at 100KHz offset frequency, respectively. This implemented oscillator is available to local wireless Communication system.