• 전자공학회논문지CI
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• 제42권5호
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• pp.31-40
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• 2005

본 연구에서는 웨이퍼의 식각, 세정, 연마 공정에 사용되는 매엽식 세정장비의 동작순서의 시뮬레이션과 단위 시간당 처리량 측정 방법에 대해 연구한다. 유한상태기계를 바탕으로 스케쥴링 알고리즘에 따른 로봇의 상태를 정의하여 시뮬레이션 모델을 구축하였으며, 이에 따른 시뮬레이션 수행을 통해 세정장비의 시간당 처리량을 측정하였다. 본 연구에서 제시한 시뮬레이션 기법을 통해 레시피와 로봇의 동작속도에 따라 세정장비의 단위시간당 처리량을 측정하고, 처리량을 극대화 할 수 있는 레시피와 로봇의 동작순서를 찾아낼 수 있다.

• 설비공학논문집
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• 제5권2호
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• pp.130-140
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• 1993

Average particle deposition velocity toward a horizontal semiconductor wafer in vertical airflow is measured by a wafer surface scanner(PMS SAS-3600). Use of wafer surface scanner requires very short exposure time normally ranging from 10 to 30 minutes, and hence makes repetition of experiment much easier. Polystyrene latex (PSL) spheres of diameter between 0.2 and $1.0{\mu}m$ are used. The present range of particle sizes is very important in controlling particle deposition on a wafer surface in industrial applications. For the present experiment, convection, diffusion, and sedimentation comprise important agents for deposition mechanisms. To investigate confidence interval of experimental data, mean and standard deviation of average deposition velocities are obtained from more than ten data set for each PSL sphere size. It is found that the distribution of mean of average deposition velocities from the measurement agrees well with the predictions of Liu and Ahn(1987) and Emi et al.(1989).

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1083-1086
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• 2005

Light scattering measurement system that can evaluate light scattering characteristic from defects on silicon wafer surface has been developed. The system uses $Ar^+$ laser as an illumination source, and a highly sensitive photomultiplier tube (PMT) for detecting scattered light from defects. Unlike with conventional measurement system, our system has ability to measure scattered light pattern from wide range of scattering angles with changeable incidence condition. It is shown that our developed system is effective to discriminate the types and sizes of defects from basic experimental results using a microscatch and a PSL sphere.

• 반도체디스플레이기술학회지
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• 제20권1호
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• pp.32-36
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• 2021

The number of processes in the manufacture of semiconductors, displays and solar cells is increasing. And as the processes is performed, multiple layers of films and various patterns are formed on the wafer. At this time, substrate warpage occurs due to the difference in stress between each film and pattern formed on the wafer. the substrate warping phenomenon occurs due to the difference in stress between each film and pattern formed on the wafer. We developed a new warpage measurement method to measure wafer warpage during real-time processing. We performed an experiment to measure the presence and degree of warpage of the substrate in real time during the process by adding only measurement equipment for applying additional electrical signals to the existing ESC and detecting the change of the additional electric signal. The additional electrical measurement signal applied at this time is very small compared to the direct current (DC) power applied to the electrostatic chuck whit a frequency that is not generally used in the process can be selectively used. It was confirmed that the measurement of substrate warpage can be easily separated from other power sources without affecting.

• 대한기계학회논문집
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• 제18권1호
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• pp.175-183
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• 1994

To investigate thermophoretic effect on particle deposition, average deposition velocity toward a horizontal wafer surface in vertical airflow is measured keeping the wafer surface temperature different from the surrounding air temperature. In the present measurement, the temperature difference is maintained in the range from -10 to $4^{\circ}$ C Polystyrene latex (PSL) spheres of diameter between 0.3 and 0.8 .mu.m are used for the experiment. The number of particles deposited on a wafer surface is estimated from the measurements using a wafer surface scanner (PMS SAS-3600). Experimental data are compared with prediction model results.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권1호
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• pp.53-58
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• 2012

A new on-wafer de-embedding method using thru, short and open patterns sequentially is proposed to eliminate the errors of conventional methods. This "thru-short-open" method is based on the removal of the coupling admittance between input and output interconnect dangling legs. The increase of the de-embedding effect of the lossy coupling capacitance on the cutoff frequency in MOSFETs is observed as the gate length is scaled down to 45 nm. This method will be very useful for accurate RF measurements of nano-scale MOSFETs.

• 제어로봇시스템학회논문지
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• 제6권9호
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• pp.831-835
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• 2000

The uniformity of themperature on a wafer is a wafer is one the most important parameters to conterol the RTF(Rapid Thermal Process) with proper input signals. It is impossible to achieve the uniformity of temperature without the exact estimation of temperature ar all points on the wafer. There fore, it is difficult to understand the internal dynamics as well as the structural complexities of the RTP, which is aprimary obstacle to measure the distributed temperatures on the wafer accurately. Furthermore, it is also hard to accomplish desirable estimation because only a few pyrometers are available in the general equipments. In the paper, a thermal model based on the chamber grometry of the AST SHS200 RTP system is developed to effectively control the thermal uniformity on the wafer. First of all, the estimation method of one-point measurement is developed, which is properly extended to the case of multi-point measurements. This thermal model is validated through simulation and experiments. The proposed work can be utilized to building a run-by -run or a real-time control of the RTP.

• 한국전자파학회논문지
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• 제25권8호
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• pp.808-820
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• 2014

본 논문에서는 10-dB 감쇠기 및 상용 패키지 된 MMIC 능동소자를 이용하여 구성된 증폭기, 2가지의 온-웨이퍼(on-wafer)형 DUT(Device-Under Test)를 구성하고, 이들의 잡음파라미터를 8-port 회로망을 이용하여 추출하는 방법을 제시하였다. 제작된 10-dB 감쇠기의 경우 수동소자이기 때문에, 이것의 S-파라미터를 측정하여 얻을 경우, 이것의 잡음파라미터를 알 수 있고, 또한 증폭기의 경우 이것의 잡음파라미터가 datasheet에 있다. 따라서 제안한 방법을 이용한 잡음파라미터 측정 결과에 대한 평가를 용이하게 할 수 있다. 기존 저자들에 의하여 발표된 6-포트회로망을 확장한 8-포트회로망을 이용한 잡음파라미터 측정은 사용된 8-포트회로망의 S-파라미터를 필요로 하는데, 동축형 DUT에 국한된다. 온-웨이퍼 프로브가 8-포트회로망에 삽입될 경우, 8-포트회로망의 S-파라미터 측정은 이종 형태의 커넥터를 갖는 8-포트회로망이 된다. 본 논문에서는 회로망 분석기(Network analyzer)의 Smart-cal 기능을 이용하여 8-포트회로망의 S-파라미터를 추출하였다. 측정된 잡음파라미터는 최소잡음지수, $NF_{min}$ 경우, 예상된 결과에 대하여 약 ${\pm}0.2dB$의 오차를 보인다. 다른 잡음파라미터는 주파수에 따라 예상된 결과와 근접하게 일치하는 결과를 보여주고 있다.

• 한국공작기계학회논문집
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• 제17권3호
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• pp.53-58
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• 2008

This study was conducted to evaluate the flatness of the porous type of dicing chuck. Two measurement systems for a vacuum chuck with a porous type of ceramic plate were prepared using a digital indicator and a laser interferometer. 6 inch of silicon and glass wafer were also used. Vacuum pressure from 100mmHg to 700mmHg by 100mmHg was increased. From experiments, chucked-wafer flatness was converged to the dicing chuck flatness itself even though the repeatability of contact method using indicator was unstable. Finally, the chuck flatness was estimated below $2{\mu}m$ with peak-to valley value.

• 한국재료학회지
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• 제24권12호
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• pp.682-688
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• 2014

Physical and chemical changes in a polished wafer and in $2.5{\mu}m$ & $4{\mu}m$ epitaxially grown Si layer wafers (Epilayer wafer) after surface treatment were investigated. We characterized the influence of surface treatment on wafer properties such as surface roughness and the chemical composition and bonds. After each surface treatment, the physical change of the wafer surface was evaluated by atomic force microscopy to confirm the surface morphology and roughness. In addition, chemical changes in the wafer surface were studied by X-ray photoemission spectroscopy measurement. Changes in the chemical composition were confirmed before and after the surface treatment. By combined analysis of the physical and chemical changes, we found that diluted hydrofluoric acid treatment is more effective than buffered oxide etching for $SiO_2$ removal in both polished and Epi-Layer wafers; however, the etch rate and the surface roughness in the given treatment are different among the polished $2.5{\mu}m$ and $4{\mu}m$ Epi-layer wafers in spite of the identical bulk structural properties of these wafers. This study therefore suggests that independent surface treatment optimization is required for each wafer type, $2.5{\mu}m$ and $4{\mu}m$, due to the meaningful differences in the initial surface chemical and physical properties.