• JSTS:Journal of Semiconductor Technology and Science
• /
• 제15권2호
• /
• pp.223-231
• /
• 2015

As smartphones support a variety of applications and their memory demand keeps increasing, the design of an efficient memory management policy is becoming increasingly important. Meanwhile, as nonvolatile memory (NVM) technologies such as PCM and STT-MRAM have emerged as new memory media of smartphones, characterizing memory references for NVM-based smartphone memory systems is needed. For the deep understanding of memory access features in smartphones, this paper performs comprehensive analysis of memory references for various smartphone applications. We first analyze the temporal locality and frequency of memory reference behaviors to quantify the effects of the two properties with respect to the re-reference likelihood of pages. We also analyze the skewed popularity of memory references and model it as a Zipf-like distribution. We expect that the result of this study will be a good guidance to design an efficient memory management policy for future smartphones.

• 휴양 및 경관연구
• /
• 제12권4호
• /
• pp.45-58
• /
• 2018

Place memory is a new way of seeing as a new concept of cultural landscape research. Various research works and discussions have recently spread in landscape studies. In particular, the, which is visible and material, is a medium in which collective memory is embedded in place memory. The purpose of this study is to extract places of memory from the collective memory of residents of Janghang, Korea, and to visualize it through semantic relations. For this purpose, semi-standardized interviews (34 persons) were conducted with residents, and frequency analysis and semantic network analysis were used. As a result, the interviewees recalled only 127 places in Janghang that existed between 1920 and 2010. Locals remember the city based on places of memory. This means that the city could be illustrated according to specific places that are frequently mentioned. For instance, the top 25 places (top 20%) explain 65.6% of all the places in the city, and the top 39 places (top 30.8%) could describe 78.7% of the places. Some places are referred to more frequently when they are in the city's symbolic landscape, and the city's identity is projected on them. Some places were mentioned only infrequently but were nevertheless very important places by which to understand Janghang. These places of memory have not appeared in the documentary records before, which shows the value of the collective memory of the locals and the effectiveness of the interviewing method. In the clustering of the semantic network, six groups of places appeared. The local residents remembered the modern industrial city and recalled it in connection with the sites of daily life. This shows the possibility of looking not only at public memory and famous heritage as a macro history but also at daily life and meaningful places as a micro history about locals. This study has significance as an initial research that identified and visualized places of memory from the perspective of local residents. Such an approach could be useful in the study of everyday life and the conservation of modern heritage.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제8권1호
• /
• pp.1-10
• /
• 2008

The present status of technical development of a highly scalable, high-speed non-volatile PCM is overviewed. Major technical challenges are described along with solutions that are being pursued in terms of innovative device structures and fabrication technologies, new phase change materials, and new memory schemes.

• 대한임베디드공학회논문지
• /
• 제10권6호
• /
• pp.391-397
• /
• 2015

Nonvolatile memories in memory hierarchy have been investigated to reduce its energy consumption because nonvolatile memories consume zero leakage power in memory cells. One of the difficulties is, however, that the endurance of most nonvolatile memory technologies is much shorter than the conventional SRAM and DRAM technology. This has limited its usage to only the low levels of a memory hierarchy, e.g., disks, that is far from the CPU. In this paper, we study the use of a new type of nonvolatile memories - the Phase Change Memory (PCM) with a DRAM buffer system as the main memory. Our design reduced the total energy of a DRAM main memory of the same capacity by 80%. These results indicate that it is feasible to use PCM technology in place of DRAM in the main memory for better energy efficiency.

• 정보저장시스템학회논문집
• /
• 제2권4호
• /
• pp.214-218
• /
• 2006

The focus and tracking servo system has been designed and proposed for the holographic memory of one dimensional spatial light modulator(SLM). The general servo method of conventional ODD system was based and modified for new holographic memory. The pre-grooved disc pattern and special dichroic coating were also included for new design in this research and the final separated optics are expected to be applied to the future general holographic memory as well as the one dimensional SLM holographic memory.

• ETRI Journal
• /
• 제32권4호
• /
• pp.642-644
• /
• 2010

With the rapid increase occurring in both the capacity and density of memory products, test and repair issues have become highly challenging. Memory repair is an effective and essential methodology for improving memory yield. An SoC utilizes built-in redundancy analysis (BIRA) with built-in self-test for improving memory yield and reliability. This letter proposes a new heuristic algorithm and new hardware architecture for the BIRA scheme. Experimental results indicate that the proposed algorithm shows near-optimal repair efficiency in combination with low area and time overheads.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제15권5호
• /
• pp.476-484
• /
• 2015

Due to the recent advances in non-volatile memory technologies such as PCM, a new memory hierarchy of computer systems is expected to appear. In this paper, we explore the performance of PCM-based swap systems and discuss how this system can be managed efficiently. Specifically, we introduce three management techniques. First, we show that the page fault handling time can be reduced by attaching PCM on DIMM slots, thereby eliminating the software stack overhead of block I/O and the context switch time. Second, we show that it is effective to reduce the page size and turn off the read-ahead option under the PCM swap system where the page fault handling time is sufficiently small. Third, we show that the performance is not degraded even with a small DRAM memory under a PCM swap device; this leads to the reduction of DRAM's energy consumption significantly compared to HDD-based swap systems. We expect that the result of this paper will lead to the transition of the legacy swap system structure of "large memory - slow swap" to a new paradigm of "small memory - fast swap."

• International Journal of Internet, Broadcasting and Communication
• /
• 제12권1호
• /
• pp.90-94
• /
• 2020

Artificial intelligence (AI) is software that learns large amounts of data and provides the desired results for certain patterns. In other words, learning a large amount of data is very important, and the role of memory in terms of computing systems is important. Massive data means wider bandwidth, and the design of the memory system that can provide it becomes even more important. Providing wide bandwidth in AI systems is also related to power consumption. AlphaGo, for example, consumes 170 kW of power using 1202 CPUs and 176 GPUs. Since more than 50% of the consumption of memory is usually used by system chips, a lot of investment is being made in memory technology for AI chips. MRAM, PRAM, ReRAM and Hybrid RAM are mainly studied. This study presents various memory technologies that are being studied in artificial intelligence chip design. Especially, MRAM and PRAM are commerciallized for the next generation memory. They have two significant advantages that are ultra low power consumption and nearly zero leakage power. This paper describes a comparative analysis of the four representative new memory technologies.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1998년도 추계종합학술대회 논문집
• /
• pp.719-722
• /
• 1998

Fault simulation for large and complex sequential circuits is highly cpu-intensive task in the intergrated circuit design process. In this paper, we propose CM-SIM, a concurrent fault simulator which employs an optimal memory management strategy and simple list operations. CM-SIM removes inefficiencies and uses new dynamic memory management strategies, using contiguous array memory. Consequently, we got improved performance and reduced memory usage in concurrent fault simulation.

• 한국정보통신학회논문지
• /
• 제11권12호
• /
• pp.2298-2305
• /
• 2007

최근 임베디드 시스템에 대한 많은 연구들이 진행 중이다. 임베디드 시스템은 점점 소형화 추세로 가고 있다. DOM(Disk On Module)저장장치는 공간에 제한이 있는 응용프로그램이나 모바일 등의 기기에 사용할 수 있다. 본 논문에서는 DOM(Disk On Module) 메모리를 사용하여, 리눅스 기반의 커널을 탑재하고, DOM 메모리 만으로 시스템이 구동될 수 있도록 한다. DOM(Disk On Module) 메모리의 용량 제한으로 인하여 소형 운영체제가 필수적이다. 이를 위해 본 논문은 기존의 리눅스 운영체제를 DOM 환경에 적합하도록 경량화시켜서 설계하였다. 리눅스 운영체제를 경량화한 후, DOM(Disk On module)에 부트 로더의 한 종류인 LILO를 설치하여 DOM(Disk On module)메모리 상에서 새롭게 설계된 경량 리눅스 운영체제가 일반 리눅스 운영체제처럼 부팅될 수 있게 만들어 준다. 본 논문은 일반 리눅스 PC와 성능을 비교하는 실험을 수행하였다.