• The Transactions of the Korea Information Processing Society
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• v.6 no.5
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• pp.1189-1202
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• 1999

As compared with VOD data, NOD article data has the following characteristics: it is created at any time, has a short life cycle, is selected as not one article but several articles by a user, and has high access locality in time. Because of these intrinsic features, user access patterns of NOD article data are different from those of VOD. Thus, building NOD system using the existing techniques of VOD system leads to poor performance. In this paper, we analysis the log file of a currently running electronic newspaper, show that the popularity distribution of NOD articles is different from Zipf distribution of VOD data, and suggest a new popularity model of NOD article data MS-Zipf(Multi-Selection Zipf) distribution and its approximate solution. Also we present a life cycle model of NOD article data, which shows changes of popularity over time. Using this life cycle model, we develop LLBF (Largest Life-cycle Based Frequency) prefetching algorithm and analysis he performance by simulation. The developed LLBF algorithm supports the similar level in hit-ratio to the other prefetching algorithms such as LRU(Least Recently Used) etc, while decreasing the number of data replacement in article prefetching and reducing the overhead of the prefetching in system performance. Using the accurate user access patterns of NOD article data, we could analysis correctly the performance of NOD server system and develop the efficient policies in the implementation of NOD server system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.83-88
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• 2008

In this paper, a new scheduling method considering bit-level delays for high-level synthesis is proposed. Conventional bit-level delay calculation for high-level synthesis was usually limited for specific resources. However, we have developed an efficient bit-level delay calculation method which is applicable to various resources, in this research. This method is applied to scheduling. The scheduling algorithm is based on list scheduling and executes chaining considering bit-level delays. Furthermore, multi-cycle chaining can be allowed to improve performance under resource constraints. Experimental results on several well-known DSP examples show that our method improves the performance of the results by 14.7% on the average.

• Journal of the Korean Operations Research and Management Science Society
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• v.22 no.3
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• pp.37-58
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• 1997

An AI approach with tabu search is designed to solve multi-level knapsack problems. The approach performs intelligent actions with memories of historic data and learning effect. These action are developed ont only by observing the attributes of the optimal solution, the solution space, and its corresponding path to the optimal, but also by applying human intelligence, experience, and intuition with respect to the search strategies. The approach intensifies, or diversifies the search process appropriately in time and space. In order to create a good neighborhood structure, this approach uses two powerful choice rules that emphasize the impact of candidate variables on the current solution with respect to their profit contribution. "Pseudo moves", similar to "aspirations", support these choice rules during the evaluation process. For the purpose of visiting as many relevant points as possible, strategic oscillation between feasible and infeasible solutions around the boundary is applied. To avoid redundant moves, short-term (tabu-lists), intemediate-term (cycle-detection), and long-term (recording frequency and significant solutions for diversfication) memories are used. Test results show that among the 45 generated problems (these problems pose significant or insurmountable challenges to exact methods) the approach produces the optimal solutions in 39 cases.lutions in 39 cases.

• Journal of Korean Society of Water and Wastewater
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• v.23 no.1
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• pp.121-128
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• 2009

Objectives of this study were to investigate influencing factors of detention time, particle size distribution, and filter medium characteristics for waterworks sludge dewatering. The stepped pressure filtration was carried out with lab scale apparatus and the filter press pilot test for dewatering was conducted at the water treatment plant. Effects of filter medium and polymer dose were examined through observing water content and dewatering velocity and cyclic dewatering rate with filter press pilot test. Relationships among detention time, particle size distribution and filtration resistance were analyzed. Prolongation of sludge detention time was found to cause blinding phenomenon in cake and filter medium and to decrease dewatering process efficiency. The average specific resistance increased according to detention time. In pilot test of dewatering for thickened sludge with Nylon Multi-NY840D and Nylon Mono-100% filter media, dewatering velocities were 0.92 and $0.93kg\;DS/m^2{\cdot}hr$ according to 0.1% polymer dose of dried solids weight base. And cyclic dewatering rates were 2.45 and $2.50kg\;DS/m^2{\cdot}cycle$ cycle for the Nylon Multi-NY840D and Nylon Mono-100% media. Dewatering velocity of polymer dosed sludge was observed to be higher than that of non-polymer sludge.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.3
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• pp.137-144
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• 2016

In this paper, we have proposed a circuit complexity optimization ILP algorithm of high-level synthesis system for new multiprocessor design. We have analyzed to the operator characteristics and structure of datapath in the most important high-level synthesis. We also introduced the concept of virtual operator for the scheduling of multi-cycle operations. Thus, we demonstrated the complexity to implement a multi-cycle operation of the operator, regardless of the type of operation that can be applied for commonly use in the ILP algorithm. We have achieved is that standard benchmark model for the scheduling of the 5th digital wave filter, it was exactly the same due to the existing datapath scheduling results.

• Journal of information and communication convergence engineering
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• v.9 no.1
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• pp.32-37
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• 2011

In dispersion management (DM) and optical phase conjugation applied into optical transmission links with multi fiber spans for minimizing the impact of nonlinearity and group velocity (GVD), implementation possibility of DM using only one fiber span for pre- or postcompensation was assessed as a function of duty cycle of RZ pulse and residual dispersion per span (RDPS). It is confirmed that DM with optimal net residual dispersion (NRD) controlled by only one fiber span could be sufficiently applied into optical transmission links, though optimal NRD is more increased than that in transmission links with the general DM scheme of pre- and postcompensation. Thus, it is expected that optical transmission system is simply designed and implemented by applying the proposed DM scheme into real optical transmission links. Also, it is confirmed that the advantageous duty cycle of RZ is 0.5 and RDPS is setting to be small value for the effective transmitting wide signal wavelength range in optical links with optimal NRD controlled by only one fiber span.

• Industrial Engineering and Management Systems
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• v.11 no.1
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• pp.48-53
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• 2012

Due to the customer needs of reducing cost and delivery date shorting, prompt change in the production plan became more important. In the multi period system (For instance, production line.) where target processing time exists, production, idle and delay risks occur repeatedly for multiple periods. In such situations, delay of one process may influence the delivery date of an entire process. In this paper, we discuss the minimum expected cost of the case mentioned above, where the risk depends on the previous situation and occurs repeatedly for multiple periods. This paper considers the optimal switching frequency to minimize the total expected cost of the production process. In this paper, first, the optimal switching frequency model is proposed. Next, the mathematic formulation of the total expectation is presented. Finally, the policy of optimal switching frequency is investigated by numerical experiments.

• Earthquakes and Structures
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• v.7 no.3
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• pp.271-294
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• 2014

In recent years, along with the advances made in performance-based design optimization, the need for fast calculation of response parameters in dynamic analysis procedures has become an important issue. The main problem in this field is the extremely high computational demand of time-history analyses which may convert the solution algorithm to illogical ones. Two simplifying strategies have shown to be very effective in tackling this problem; first, simplified nonlinear modeling investigating minimum level of structural modeling sophistication, second, wavelet analysis of earthquake records decreasing the number of acceleration points involved in time-history loading. In this paper, we try to develop an efficient framework, using both strategies, to solve the performance-based multi-objective optimal design problem considering the initial cost and the seismic damage cost of steel moment-frame structures. The non-dominated sorting genetic algorithm (NSGA-II) is employed as the optimization algorithm to search the Pareto optimal solutions. The constraints of the optimization problem are considered in accordance with Federal Emergency Management Agency (FEMA) recommended design specifications. The results from numerical application of the proposed framework demonstrate the capabilities of the framework in solving the present multi-objective optimization problem.

• Smart Structures and Systems
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• v.29 no.5
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• pp.677-691
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• 2022

Water cycle algorithm (WCA) has been a very effective optimization technique for complex engineering problems. This study employs the WCA for simultaneous prediction of heating load (L_H) and cooling load (L_C) in residential buildings. This algorithm is responsible for optimally tuning a neural network (NN). Utilizing 614 records, the behavior of the L_H and L_C is explored and the captured knowledge is then used to predict for 154 unanalyzed building conditions. Since the WCA is a population-based algorithm, different numbers of the searching agents were tested to find the most optimum configuration. It was observed that the best solution is discovered by 500 agents. A comparison with five newly-developed benchmark optimizers, namely equilibrium optimizer (EO), multi-tracker optimization algorithm (MTOA), slime mould algorithm (SMA), multi-verse optimizer (MVO), and electromagnetic field optimization (EFO) revealed that the WCANN predicts the desired parameters with considerably larger accuracy. Obtained root mean square errors (1.4866, 2.1296, 2.8279, 2.5727, 2.5337, and 2.3029 for the L_H and 2.1767, 2.6459, 3.1821, 2.9732, 2.9616, and 2.6890 for the L_C) indicated that the most reliable prediction was presented by the proposed model. The EFONN, however, provided a more time-effective solution. Lastly, an explicit predictive formula was elicited from the WCANN.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.23-30
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• 2005

This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.