• Title/Summary/Keyword: modular codes

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SELF-DUAL CODES OVER ℤp2 OF SMALL LENGTHS

  • Choi, Whan-hyuk;Park, Young Ho
    • Korean Journal of Mathematics
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    • v.25 no.3
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    • pp.379-388
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    • 2017
  • Self-dual codes of lengths less than 5 over ${\mathbb{Z}}_p$ are completely classified by the second author [The classification of self-dual modular codes, Finite Fields Appl. 17 (2011), 442-460]. The number of such self-dual codes are also determined. In this article we will extend the results to classify self-dual codes over ${\mathbb{Z}}_{p^2}$ of length less than 5 and give the number of codes in each class. Explicit and complete classifications for small p's are also given.

AN EFFICIENT CONSTRUCTION OF SELF-DUAL CODES

  • Kim, Jon-Lark;Lee, Yoonjin
    • Bulletin of the Korean Mathematical Society
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    • v.52 no.3
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    • pp.915-923
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    • 2015
  • Self-dual codes have been actively studied because of their connections with other mathematical areas including t-designs, invariant theory, group theory, lattices, and modular forms. We presented the building-up construction for self-dual codes over GF(q) with $q{\equiv}1$ (mod 4), and over other certain rings (see [19], [20]). Since then, the existence of the building-up construction for the open case over GF(q) with $q=p^r{\equiv}3$ (mod 4) with an odd prime p satisfying $p{\equiv}3$ (mod 4) with r odd has not been solved. In this paper, we answer it positively by presenting the building-up construction explicitly. As examples, we present new optimal self-dual [16, 8, 7] codes over GF(7) and new self-dual codes over GF(7) with the best known parameters [24, 12, 9].

New Error Control Algorithms for Residue Number System Codes

  • Xiao, Hanshen;Garg, Hari Krishna;Hu, Jianhao;Xiao, Guoqiang
    • ETRI Journal
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    • v.38 no.2
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    • pp.326-336
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    • 2016
  • We propose and describe new error control algorithms for redundant residue number systems (RRNSs) and residue number system product codes. These algorithms employ search techniques for obtaining error values from within a set of values (that contains all possible error values). For a given RRNS, the error control algorithms have a computational complexity of $t{\cdot}O(log_2\;n+log_2\;{\bar{m}})$ comparison operations, where t denotes the error correcting capability, n denotes the number of moduli, and ${\bar{m}}$ denotes the geometric average of moduli. These algorithms avoid most modular operations. We describe a refinement to the proposed algorithms that further avoids the modular operation required in their respective first steps, with an increase of ${\lceil}log_2\;n{\rceil}$ to their computational complexity. The new algorithms provide significant computational advantages over existing methods.

Development of a Basic Structure Design System for Machine Tools by Modular Construction Method (모듈러 구성법을 이용한 공작기계의 기본 구조설계 시스템 개발)

  • 임동휘;김석일
    • Korean Journal of Computational Design and Engineering
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    • v.5 no.2
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    • pp.136-143
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    • 2000
  • The appearance of new machine tools with higher flexibility is in need of a basic structure design system for establishing the systematic and rationalized design and manufacturing procedures. In this study. the basic structure design system for machine tools is realized based on the modular construction method. Machine tools are represented as a whole and modular complex with the directed graph, and all possible structural configurations and codes of machine tools for satisfying the machining requirement are derived from the DNA data and connecting patterns of basic structural elements. Especially the structural configurations of machine tools are visualized by the solid modeling techniques and 3-D graphics techniques.

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Design of Self-Reconfigurable Kinematics and Control Engine for Modular Robot (모듈러 로봇의 작업 적응성을 위한 자가 재구성 제어 엔진)

  • Do, HyunMin;Choi, Tae-Yong;Park, DongIl;Kim, DooHyeong;Son, Youngsu
    • The Journal of Korea Robotics Society
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    • v.11 no.4
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    • pp.270-276
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    • 2016
  • This paper proposes a design methodology of self-reconfigurable kinematics and control engine for modular and reconfigurable robots. A modular manipulator has been proposed to meet the requirement of task adaptation in versatile needs for service and industrial robot area and the function of self-reconfiguration is required to extend the application of modular robots. Kinematic and dynamic contexts are extracted from the module and assembly information and related codes are automatically generated including controller. Thus a user can easily build and use a modular robot without professional knowledge. Simulation results are presented to verify the validity of the proposed method.

A Modular Pointer Analysis using Function Summaries (함수 요약을 이용한 모듈단위 포인터분석)

  • Park, Sang-Woon;Kang, Hyun-Goo;Han, Tai-Sook
    • Journal of KIISE:Software and Applications
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    • v.35 no.10
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    • pp.636-652
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    • 2008
  • In this paper, we present a modular pointer analysis algorithm based on the update history. We use the term 'module' to mean a set of mutually recursive procedures and the term 'modular analysis' to mean a program analysis that does not need the source codes of the other modules to analyze a module. Since a modular pointer analysis does not utilize any information on the callers, it is difficult to design a precise analysis that does not lose the information related to the program flow or the calling context. In this paper, we propose a modular and flow- and context-sensitive pointer analysis algorithm based on the update history that can memory states of a procedure independently of the information on the calling context and keep the information on the order of side effects performed. Such a memory representation not only enables the analysis to be formalized as a modular analysis, but also helps the analysis to effectively identify killed side effects and relevant alias contexts.

Design of Low-Latency Architecture for AB2 Multiplication over Finite Fields GF(2m) (유한체 GF(2m)상의 낮은 지연시간의 AB2 곱셈 구조 설계)

  • Kim, Kee-Won;Lee, Won-Jin;Kim, HyunSung
    • IEMEK Journal of Embedded Systems and Applications
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    • v.7 no.2
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    • pp.79-84
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    • 2012
  • Efficient arithmetic design is essential to implement error correcting codes and cryptographic applications over finite fields. This article presents an efficient $AB^2$ multiplier in GF($2^m$) using a polynomial representation. The proposed multiplier produces the result in m clock cycles with a propagation delay of two AND gates and two XOR gates using O($2^m$) area-time complexity. The proposed multiplier is highly modular, and consists of regular blocks of AND and XOR logic gates. Especially, exponentiation, inversion, and division are more efficiently implemented by applying $AB^2$ multiplication repeatedly rather than AB multiplication. As compared to related works, the proposed multiplier has lower area-time complexity, computational delay, and execution time and is well suited to VLSI implementation.

Low Complexity Systolic Montgomery Multiplication over Finite Fields GF(2m) (유한체상의 낮은 복잡도를 갖는 시스톨릭 몽고메리 곱셈)

  • Lee, Keonjik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.18 no.1
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    • pp.1-9
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    • 2022
  • Galois field arithmetic is important in error correcting codes and public-key cryptography schemes. Hardware realization of these schemes requires an efficient implementation of Galois field arithmetic operations. Multiplication is the main finite field operation and designing efficient multiplier can clearly affect the performance of compute-intensive applications. Diverse algorithms and hardware architectures are presented in the literature for hardware realization of Galois field multiplication to acquire a reduction in time and area. This paper presents a low complexity semi-systolic multiplier to facilitate parallel processing by partitioning Montgomery modular multiplication (MMM) into two independent and identical units and two-level systolic computation scheme. Analytical results indicate that the proposed multiplier achieves lower area-time (AT) complexity compared to related multipliers. Moreover, the proposed method has regularity, concurrency, and modularity, and thus is well suited for VLSI implementation. It can be applied as a core circuit for multiplication and division/exponentiation.

Implementing stream processing functionalities of Splash (Splash의 스트림 프로세싱 기능 구현)

  • Ahn, Jaeho;Noh, Soonhyun;Hong, Seongsoo
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2019.01a
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    • pp.377-380
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    • 2019
  • To accommodate for the difficult task of satisfying application's system timing constraints, we are developing Splash, a real time stream processing language for embedded AI applications. Splash is a graphical programming language that designs applications through data flow graph which, later automatically generates into codes. The codes are compiled and executed on top of the Splash runtime system. The Splash runtime system supports two aspects of the application. First, it supports the basic stream processing functions required for an application to operate on multiple streams of data. Second, it supports the checking and handling of the user configurated timing constraints. In this paper we explain the implementation of the first aspect of the Splash runtime system which is being developed using a real time communication middleware called DDS.

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