• 제목/요약/키워드: micro dielectric

검색결과 215건 처리시간 0.027초

Mechanism Study of Flowable Oxide Process for Sur-100nm Shallow Trench Isolation

  • Kim, Dae-Kyoung;Jang, Hae-Gyu;Lee, Hun;In, Ki-Chul;Choi, Doo-Hwan;Chae, Hee-Yeop
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.68-68
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    • 2011
  • As feature size is smaller, new technology are needed in semiconductor factory such as gap-fill technology for sub 100nm, development of ALD equipment for Cu barrier/seed, oxide trench etcher technology for 25 nm and beyond, development of high throughput Cu CMP equipment for 30nm and development of poly etcher for 25 nm and so on. We are focus on gap-fill technology for sub-30nm. There are many problems, which are leaning, over-hang, void, micro-pore, delaminate, thickness limitation, squeeze-in, squeeze-out and thinning phenomenon in sub-30 nm gap fill. New gap-fill processes, which are viscous oxide-SOD (spin on dielectric), O3-TEOS, NF3 Based HDP and Flowable oxide have been attempting to overcome these problems. Some groups investigated SOD process. Because gap-fill performance of SOD is best and process parameter is simple. Nevertheless these advantages, SOD processes have some problems. First, material cost is high. Second, density of SOD is too low. Therefore annealing and curing process certainly necessary to get hard density film. On the other hand, film density by Flowable oxide process is higher than film density by SOD process. Therefore, we are focus on Flowable oxide. In this work, dielectric film were deposited by PECVD with TSA(Trisilylamine - N(SiH3)3) and NH3. To get flow-ability, the effect of plasma treatment was investigated as function of O2 plasma power. QMS (quadruple mass spectrometry) and FTIR was used to analysis mechanism. Gap-filling performance and flow ability was confirmed by various patterns.

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The Structural and Electrical Properties of Bismuth-based Pyrochlore Thin Films for embedded Capacitor Applications

  • Ahn, Kyeong-Chan;Park, Jong-Hyun;Ahn, Jun-Ku;Yoon, Soon-Gil
    • Transactions on Electrical and Electronic Materials
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    • 제8권2호
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    • pp.84-88
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    • 2007
  • [ $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ ] (BZN), $Bi_2Mg_{2/3}Nb_{4/3}O_7$ (BMN), and $Bi_2Cu_{2/3}Nb_{4/3}O_7$ (BCN) pyrochlore thin films were prepared on $Cu/Ti/SiO_2/Si$ substrates by pulsed laser deposition and the micro-structural and electrical properties were characterized for embedded capacitor applications. The BZN, BMN, and BCN films deposited at $25\;^{\circ}C$ and $150\;^{\circ}C$, respectively show smooth surface morphologies and dielectric constants of about $39\;{\sim}\;58$. The high dielectric loss of the films deposited at $150\;^{\circ}C$ compared with films deposited at $25\;^{\circ}C$ was attributed to the defects existing at interface between the films and copper electrode by an oxidation of copper bottom electrode. The leakage current densities and breakdown voltages in 200 nm thick-BMN and BZN films deposited at $150\;^{\circ}C$ are approximately $2.5\;{\times}\;10^{-8}\;A/cm^2$ at 3 V and above 10 V, respectively. Both BZN and BMN films are considered to be suitable materials for embedded capacitor applications.

Physics-based Algorithm Implementation for Characterization of Gate-dielectric Engineered MOSFETs including Quantization Effects

  • Mangla, Tina;Sehgal, Amit;Saxena, Manoj;Haldar, Subhasis;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제5권3호
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    • pp.159-167
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    • 2005
  • Quantization effects (QEs), which manifests when the device dimensions are comparable to the de Brogile wavelength, are becoming common physical phenomena in the present micro-/nanometer technology era. While most novel devices take advantage of QEs to achieve fast switching speed, miniature size and extremely small power consumption, the mainstream CMOS devices (with the exception of EEPROMs) are generally suffering in performance from these effects. In this paper, an analytical model accounting for the QEs and poly-depletion effects (PDEs) at the silicon (Si)/dielectric interface describing the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of MOS devices with thin oxides is developed. It is also applicable to multi-layer gate-stack structures, since a general procedure is used for calculating the quantum inversion charge density. Using this inversion charge density, device characteristics are obtained. Also solutions for C-V can be quickly obtained without computational burden of solving over a physical grid. We conclude with comparison of the results obtained with our model and those obtained by self-consistent solution of the $Schr{\ddot{o}}dinger$ and Poisson equations and simulations reported previously in the literature. A good agreement was observed between them.

금속 전극 알루미나 박막 캐패시터의 전기적 특성에 미치는 미세구조의 영향 (Effect of Microstructure on Electrical Properties of Thin Film Alumina Capacitor with Metal Electrode)

  • 정명선;주병권;오영제;이전국
    • 한국재료학회지
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    • 제21권6호
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    • pp.309-313
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    • 2011
  • The power capacitors used as vehicle inverters must have a small size, high capacitance, high voltage, fast response and wide operating temperature. Our thin film capacitor was fabricated by alumina layers as a dielectric material and a metal electrode instead of a liquid electrolyte in an aluminum electrolytic capacitor. We analyzed the micro structures and the electrical properties of the thin film capacitors fabricated by nano-channel alumina and metal electrodes. The metal electrode was filled into the alumina nano-channel by electroless nickel plating with polyethylene glycol and a palladium catalyst. The spherical metals were formed inside the alumina nano pores. The breakdown voltage and leakage current increased by the chemical reaction of the alumina layer and $PdCl_2$ solution. The thickness of the electroless plated nickel layer was 300 nm. We observed the nano pores in the interface between the alumina layer and the metal electrode. The alumina capacitors with nickel electrodes had a capacitance density of 100 $nF/cm^2$, dielectric loss of 0.01, breakdown voltage of 0.7MV/cm and leakage current of $10^4{\mu}A$.

플라즈마 표면 처리를 이용한 TiO2 MOS 커패시터의 특성 개선 (Improvement in Capacitor Characteristics of Titanium Dioxide Film with Surface Plasma Treatment)

  • 신동혁;조혜림;박세란;오훈정;고대홍
    • 반도체디스플레이기술학회지
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    • 제18권1호
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    • pp.32-37
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    • 2019
  • Titanium dioxide ($TiO_2$) is a promising dielectric material in the semiconductor industry for its high dielectric constant. However, for utilization on Si substrate, $TiO_2$ film meets with a difficulty due to the large leakage currents caused by its small conduction band energy offset from Si substrate. In this study, we propose an in-situ plasma oxidation process in plasma-enhanced atomic layer deposition (PE-ALD) system to form an oxide barrier layer which can reduce the leakage currents from Si substrate to $TiO_2$ film. $TiO_2$ film depositions were followed by the plasma oxidation process using tetrakis(dimethylamino)titanium (TDMAT) as a Ti precursor. In our result, $SiO_2$ layer was successfully introduced by the plasma oxidation process and was used as a barrier layer between the Si substrate and $TiO_2$ film. Metal-oxide-semiconductor ($TiN/TiO_2/P-type$ Si substrate) capacitor with plasma oxidation barrier layer showed improved C-V and I-V characteristics compared to that without the plasma oxidation barrier layer.

A Disparate Low Loss DC to 90 GHz Wideband Series Switch

  • Gogna, Rahul;Jha, Mayuri;Gaba, Gurjot Singh;Singh, Paramdeep
    • Transactions on Electrical and Electronic Materials
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    • 제17권2호
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    • pp.92-97
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    • 2016
  • This paper presents design and simulation of wide band RF microswitch that uses electrostatic actuation for its operation. RF MEMS devices exhibit superior high frequency performance in comparison to conventional devices. Similar techniques that are used in Very Large Scale Integration (VLSI) can be employed to design and fabricate MEMS devices and traditional batch-processing methods can be used for its manufacturing. The proposed switch presents a novel design approach to handle reliability concerns in MEMS switches like dielectric charging effect, micro welding and stiction. The shape has been optimized at actuation voltage of 14-16 V. The switch has an improved restoring force of 20.8 μN. The design of the proposed switch is very elemental and primarily composed of electrostatic actuator, a bridge membrane and coplanar waveguide which are suspended over the substrate. The simple design of the switch makes it easy for fabrication. Typical insertion and isolation of the switch at 1 GHz is -0.03 dB and -71 dB and at 85 GHz it is -0.24 dB and -29.8 dB respectively. The isolation remains more than - 20 db even after 120 GHz. To our knowledge this is the first demonstration of a metal contact switch that shows such a high and sustained isolation and performance at W-band frequencies with an excellent figure-of merit (fc=1/2.pi.Ron.Cu =1,900 GHz). This figure of merit is significantly greater than electronic switching devices. The switch would find extensive application in wideband operations and areas where reliability is a major concern.

전기영동형 전자종이를 위한 $TiO_2$ 나노분말의 분산 제어 (A control dispersion of $TiO_2$ nano powder for electronic paper of electrophoresis)

  • 김중희;오효진;이남희;황종선;김선재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.324-327
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    • 2005
  • An electrophoretic display using $TiO_2$ particles is the most promising candidate because it offers various advantages such as ink-on-paper appearance, good contrast ratio, wide viewing angle, image stability in the off-state and extremely low power consumption. The core technology of electrophoretic display is the dispersion controlling of $TiO_2$ nano particles in nonaqueous solution. To prepare an ink for electronic paper using electrophoretic properties of $TiO_2$ nano particles, cyclohexane with low dielectric constant and transparency, polyethylene for producing polymer coating layer which reduces apparent gravity of $TiO_2$, and $TiO_2$ powders were mixed together by planetary-mill. The zeta-potential value of $TiO_2$ particles in cyclohexane was measured about -40mV, but was measured over -110mV by dispersant attached to polyethylene-coated $TiO_2$ surface. Prepared electronic ink was filled in cross patterned micro-wall with $200{\mu}m$ in width and $40{\mu}m$ in height on ITO glass designed by photolithography. The response time of electronic paper evaluated by mobility of $TiO_2$ particle between micro-walls was measured 0.067sec, but the drift velocity from reflectance wave form during reverse from of electronic ink was measured 0.07cm/sec.

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PDP Rib용 Bi2O3-B2O3-ZnO계 유리의 물성과 구조 (Properties and Structures of Bi2O3-B2O3-ZnO Glasses for Application in Plasma Display Panels Rib)

  • 진영훈;전영욱;이병철;류봉기
    • 한국세라믹학회지
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    • 제39권2호
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    • pp.184-189
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    • 2002
  • 본 연구는, PbO-base 유리계의 정보와의 비교 등을 통해 Bi-base 조성 PDP rib으로의 새로운 유리조성 설계를 위한 기초연구의 일환이다. PbO와 유사한 밀도값 및 작업 용이성을 갖고 있는 Bi를 도입한 $Bi_2O_3-B_2O_3-ZnO$ 조성계에 대해, 연화점, 열팽창계수, 에칭성, 유전율 등의 특성측정 및 XPS로 조성에 따른 구조변화 등을 조사하였다. $Bi_2O_3$를 50∼80 wt%까지 폭넓게 첨가된 $Bi_2O_3-B_2O_3-ZnO$계 유리들은 조성에 따라 연화점이 400∼480$^{\circ}C$, 열팽창계수가 $68{\sim}72{\times}10^{-7}/^{\circ}C$, 유전상수는 13∼25으로서 동조성의 Pb-base 조성계와 유사한 물성치를 나타내었다. 특히, Bi의 함유량이 70∼65 wt%의 조성의 경우, 성분 및 물성의 미세조정 등을 통해 rib 재료의 출발조성으로서 적용가능성이 확인되었다. $Bi_2O_3$의 양이 감소함에 따라 $O_{1s}$ peak에서의 결합에너지의 증가와 반가폭(FWHM)이 감소하였는데, 이는 비가교산소의 증가에 기인하였다.

초전도체 절연용 재료의 전기적 절연 특성과 개발에 관한 연구-복합 재료의 매트릭스에 대하여- (A Study on the Development and Dielectric Properties of Insulating Materials for Super-Conductor -For Matrix of Composite Materials-)

  • 조정수;최세원;김종경;이규철;이종호
    • 대한전기학회논문지
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    • 제38권7호
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    • pp.511-523
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    • 1989
  • 본 논문에서는 내열성 에폭시 수지의 1차 경화방법에 따른 물성, 전기적 및 기계적 특성과 2차 경화조건에 따른 상온 및 액체질소내에서의 전기적 및 기계적 특성에 관한 연구를 행하였다. 본 연구의 실험결과에서, 첫째, 내열성 에폭시 수지의 1차 경화방법에 있어, 1차 경화시에 에폭시 수지의 물성특성, 전기적 및 기계적 특성에 커다란 영향을 미치고 있음을 알 수 있었다. 즉, 시료제작시에 에폭시 수지의 내부반응온도를 최대한 억제시킴으로서 우수한 제반특성을 가지는 시료를 제작할 수 있음을 알 수 있었다. 둘째, 최적의 전기적 기계적 특성을 가지는 시료는 에폭시 수지의 2차 경화조건에서 볼때, $100^{\circ}C$에서 반복 2차 경화방법에서 얻을 수 있었다. 셋째, 액체질소내에서의 $Tan{\delta}$${\varepsilon}_{\gamma}$특성은 상온에서의 $Tan{\delta}$${\varepsilon}_{\gamma}$보다 각각 2배 정도 낮게 나타났다. 넷째, 액체질소내에서의 에폭시 수지의 절연강도는 상온에서 보다 0.6-1.0[MV/cm]정도 높게 나타났다. 그리고 에폭시 수지내의 미세결함 발생 및 과잉 열운동으로 한 에폭시 수지 자체의 열 열화등은 상온에서의 절연파괴강도보다 액체질소내에서의 절연파괴강도에 더욱 중요한 인자로 나타남을 알 수 있었다. 수 있었다.

임베디드 커패시터로의 응용을 위해 상온에서 RF 스퍼터링법에 의한 증착된 bismuth magnesium niobate 다층 박막의 특성평가 (The characteristics of bismuth magnesium niobate multi layers deposited by sputtering at room temperature for appling to embedded capacitor)

  • 안준구;조현진;유택희;박경우;웬지긍;허성기;성낙진;윤순길
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.62-62
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    • 2008
  • As micro-system move toward higher speed and miniaturization, requirements for embedding the passive components into printed circuit boards (PCBs) grow consistently. They should be fabricated in smaller size with maintaining and even improving the overall performance. Miniaturization potential steps from the replacement of surface-mount components and the subsequent reduction of the required wiring-board real estate. Among the embedded passive components, capacitors are most widely studied because they are the major components in terms of size and number. Embedding of passive components such as capacitors into polymer-based PCB is becoming an important strategy for electronics miniaturization, device reliability, and manufacturing cost reduction Now days, the dielectric films deposited directly on the polymer substrate are also studied widely. The processing temperature below $200^{\circ}C$ is required for polymer substrates. For a low temperature deposition, bismuth-based pyrochlore materials are known as promising candidate for capacitor $B_2Mg_{2/3}Nb_{4/3}O_7$ ($B_2MN$) multi layers were deposited on Pt/$TiO_2/SiO_2$/Si substrates by radio frequency magnetron sputtering system at room temperature. The physical and structural properties of them are investigated by SEM, AFM, TEM, XPS. The dielectric properties of MIM structured capacitors were evaluated by impedance analyzer (Agilent HP4194A). The leakage current characteristics of MIM structured capacitor were measured by semiconductor parameter analysis (Agilent HP4145B). 200 nm-thick $B_2MN$ muti layer were deposited at room temperature had capacitance density about $1{\mu}F/cm^2$ at 100kHz, dissipation factor of < 1% and dielectric constant of > 100 at 100kHz.

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