• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.3
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• pp.141-145
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• 2018

Ni-InGaAs shows promise as a self-aligned S/D (source/drain) alloy for n-InGaAs MOSFETs (metal-oxide-semiconductor field-effect transistors). However, limited thermal stability and instability of the microstructural morphology of Ni-InGaAs could limit the device performance. The in situ deposition of a Pd interlayer beneath the Ni layer was proposed as a strategy to improve the thermal stability of Ni-InGaAs. The Ni-InGaAs alloy layer prepared with the Pd interlayer showed better surface roughness and thermal stability after furnace annealing at $570^{\circ}C$ for 30 min, while the Ni-InGaAs without the Pd interlayer showed degradation above $500^{\circ}C$. The Pd/Ni/TiN structure offers a promising route to thermally immune Ni-InGaAs with applications in future n-InGaAs MOSFET technologies.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.819-825
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• 2016

In this paper, a phase locked loop structure with parallel dual loop which have a different bandwidth has been proposed. The bandwidths depending on transfer functions are obtained through dual loops. Two different bandwidths of each loop are used to suppress noise on the operating frequency range. The proposed phase locked loop has two different voltage controlled oscillator gains to control two different wide and narrow loop filters. Furthermore, it has the locking status indicator to achieve an accurate locking condition. The phase margin of $58.2^{\circ}$ for wide loop and $49.4^{\circ}$ for narrow loop is designed for stable operation and the phase margin of $45^{\circ}$ is maintained during both loops work together. It has been designed with a 1.8V 0.18um complementary metal oxide semiconductor (CMOS) process. The simulation results show that the proposed phase locked loop works stably and generates a target frequency.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.172-173
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• 2006

Metal-ferroelectric-insulator-semiconductor (MFIS) structures with $Bi_{3.35}La_{0.75}Ti_3O_{12}$ (BLT) ferroelectric film and Zirconium oxide ($ZrO_2$) layer were fabricated on p-type Si(100). $ZrO_2$ and BLT films were prepared by sol-gel technique. Surface morphologies of $ZrO_2$ and BLT film were measured by atomic force microscope (AFM). The electrical characteristics of Au/$ZrO_2$/Si and Au/BLT/$ZrO_2$/Si film were investigated by C-V and I-V measurements. No hysteretic characteristics was observed in the C-V curve of the Au/$ZrO_2$/Si structure. The memory window width m C-V curve of the Au/BLT/$ZrO_2$/Si diode was about 1.3 V for a voltage sweep of ${\pm}5$ V. The leakage current of Au/$ZrO_2$/Si and Au/BLT/$ZrO_2$/Si structures were about $3{\times}10^{-8}$ A at 30 MV/cm and $3{\times}10^{-8}$ A at 3 MV/cm, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.407-407
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• 2014

Nanotechnology, especially vertically grown silicon nanowires, has gotten great attentions in biology due to characteristics of one dimensional nanostructure; controllable synthetic structure such as lengths, diameters, densities. Silicon nanowires are promising materials as nanoelectrodes due to their highly complementary metal-oxide-semiconductor (CMOS) - and bio-compatibility. Silicon nanowires are so intoxicated that are effective for bio molecular delivery and electrical stimulation. Vertical nanowires with integrated Au tips were fabricated for electrical intracellular interfacing with PC-12 cells. We have made synthesized two types of nanowire devices; one is multi-nanowires electrode for bio molecular sensing and electrical stimulation, and the other is single-nanowires electrode respectively. Here, we demonstrate that differentiation of Nerve Growth Factor (NGF) treated PC-12 cells can be promoted depending on different magnitudes of electrical stimulation and density of Si NWs. It was fabricated by both bottom-up and top-down approaches using low pressure chemical vapor deposition (LPCVD) with high vacuuming environment to electrically stimulate PC-12 cells. The effects of electrical stimulation with NGF on the morphological differentiation are observed by Scanning Electron Microscopy (SEM), and it induces neural outgrowth. Moreover, the cell cytosol can be dyed selectively depending on the degree of differentiation along with fluorescence microscopy measurement. Vertically grown silicon nanowires have further expected advantages in case of single nanowire fabrication, and will be able to expand its characteristics to diverse applications.

• Journal of the Korean Chemical Society
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• v.39 no.9
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• pp.685-691
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• 1995

EHMACC and EHPC programs written in VAX version to calculate the tight-binding extended Huckel method is converted into the micro-soft fortran available to PC. The band calculation of LaNiO3 unit cell and extended ($2{\times}2{\times}1$) cell with perovskite structure is made by the PC/386 and PC/486. The calculation is also made for the DOS and the COOP. It is supposed that the electronic property of $LaNiO_3$ is semiconductor along to the ${\Gamma}{\rightarrow}H,\;H{\rightarrow}N,\;and\;N{\rightarrow}{\Gamma}(2D)$ direction with band gap about 0u.35 eV, while metal property in ${\Gamma}{\rightarrow}P\;and\;P{\rightarrow}N(3D)$ direction. The oxygen atom property in $LaNiO_3$ is more effectively affected by oxygen atom position than defect of nickel atom.

• Bulletin of the Korean Chemical Society
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• v.30 no.8
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• pp.1738-1742
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• 2009

Nanocrystalline Zn$Fe_2O_4$ oxide-semiconductor with spinel structure was synthesized by the polymerized complex (PC) method and investigated for its photocatalytic and photoelectric properties. The observation of a highly pure phase and a lower crystallization temperature in Zn$Fe_2O_4$ made by PC method is in total contrast to that was observed in Zn$Fe_2O_4$ prepared by the conventional solid-state reaction (SSR) method. The band gap of the nanocrystalline Zn$Fe_2O_4$ determined by UV-DRS was 1.90 eV (653 nm). The photocatalytic activity of Zn$Fe_2O_4$ prepared by PC method as investigated by the photo-decomposition of isopropyl alcohol (IPA) under visible light (${\geq}$ 420 nm) was much higher than that of the Zn$Fe_2O_4$ prepared by SSR as well as Ti$O_{2-x}N_x$. High photocatalytic activity of Zn$Fe_2O_4$ prepared by PC method was mainly due to its surface area, crystallinity and the dispersity of platinum metal over Zn$Fe_2O_4$.

• Journal of IKEEE
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• v.24 no.1
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• pp.208-215
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• 2020

In this study, the output 380V direct current DC-DC converter for low-voltage direct current(LVDC) distribution was designed in three types, and the voltage and current characteristics of the three types of DC-DC converter were compared and analyzed through simulation. When the converter was configured using a parallel structure with the power metal-oxide semiconductor field-effect transistor and two current suppression insulated-gate bipolar transistors(IGBTs), the time when the output voltage was stabilized at DC 380V was relatively short with 9ms and the range of output current changes was also between 44.8A and 50.2A, indicating that the width of change was much smaller and the effect of current suppression was greater compared to when IGBT was not applied(68~83A). These results suggest that the proposed DC-DC converter for LVDC distribution is likely to be applied to smart grid construction.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.5
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• pp.386-389
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• 2009

The electrical characteristics and annealing effects of tunneling dielectrics stacked with $SiO_2$ and $Si_{3}N_{4}$ were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_{3}N_{4}/SiO_2/Si_{3}N_{4}$ (NON), $SiO_2/Si_{3}N_{4}/SiO_2$ (ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS (metal-oxide-semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field. Furthermore, the increased tunneling current through engineered tunneling barriers related to high speed operation can be achieved by annealing processes.

• Journal of Sensor Science and Technology
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• v.30 no.5
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• pp.309-313
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• 2021

Organic semiconductors have received tremendous attention for their research because of their tunable electrical and optical properties that can be achieved by changing their molecular structure. However, organic materials are inherently unstable in the presence of oxygen and moisture. Therefore, it is necessary to develop moisture and air stable semiconducting materials that can replace conventional organic semiconductors. In this study, we developed a NiO_x thin film through a solution process. The electrical characteristics of the NiO_x thin film, depending on the thermal annealing temperature and UV-ozone treatment, were determined by applying them to the hole injection layer of an organic light-emitting diode. A high annealing temperature of 500 ℃ and UV-ozone treatment enhanced the conductivity of the NiO_x thin films. The optimized NiO_x exhibited beneficial hole injection properties comparable those of 1,4,5,8,9,11-hexaazatriphenylene hexacarbonitrile (HAT-CN), a conventional organic hole injection layer. As a result, both devices exhibited similar power efficiencies and the comparable electroluminescent spectra. We believe that NiO_x could be a potential solution which can provide robustness to conventional organic semiconductors.

• Journal of Convergence for Information Technology
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• v.11 no.7
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• pp.104-110
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• 2021

A novel selective oxidation process has been developed for low source/drain (S/D) series resistance of the fin channel metal oxide semiconductor field effect transistor (MOSFET). Using this technique, the selective oxidation fin-channel MOSFET (SoxFET) has the gate-all-around structure and gradually enhanced S/D extension regions. The SoxFET demonstrated over 70% reduction in S/D series resistance compared to the control device. Moreover, it was found that the SoxFET behaved better in performance, not only a higher drive current but also higher transconductances with suppressing subthreshold swing and drain induced barrier lowering (DIBL) characteristics, than the control device. The saturation current, threshold voltage, peak linear transconductance, peak saturation transconductance, subthreshold swing, and DIBL for the fabricated SoxFET are 305 ㎂/㎛, 0.33 V, 13.5 𝜇S, 76.4 𝜇S, 78 mV/dec, and 62 mV/V, respectively.