• 제목/요약/키워드: memory process

검색결과 1,767건 처리시간 0.039초

플래시메모리를 위한 scaled SONOSFET NVSM 의 프로그래밍 조건과 특성에 관한 연구 (A study on characteristics of the scaled SONOSFET NVSM for Flash memory)

  • 박희정;박승진;홍순혁;남동우;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 하계학술대회 논문집
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    • pp.751-754
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    • 2000
  • When charge-trap SONOS cells are used flash memory, the tunneling program/erase condition to minimize the generation of interface traps was investigated. SONOSFET NVSM cells were fabricated using 0.35$\mu\textrm{m}$ standard memory cell embedded logic process including the ONO cell process. based on retrograde twin-well, single-poly, single metal CMOS process. The thickness of ONO triple-dielectric for memory cell is tunnel oxide of 24${\AA}$, nitride of 74 ${\AA}$, blocking oxide of 25 ${\AA}$, respectively. The program mode(Vg: 7,8,9 V, Vs/Vd: -3 V, Vb: floating) and the erase mode(Vg: -4,-5,-6 V, Vs/Vd: floating, Vb: 3V) by modified Fowler-Nordheim(MFN) tunneling were used. The proposed programming condition for the flash memory of SONOSFET NVSM cells showed less degradation($\Delta$Vth, S, Gm) characteristics than channel MFN tunneling operation. Also the program inhibit conditions of unselected cell for separated source lines NOR-tyupe flash memory application were investigated. we demonstrated that the program disturb phenomenon did not occur at source/drain voltage of 1 V∼4 V and gate voltage of 0 V∼4.

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A Theoretical Comparison of Two Possible Shape Memory Processes in Shape Memory Alloy Reinforced Metal Matrix Composite

  • Lee Jae Kon;Kim Gi Dae
    • Journal of Mechanical Science and Technology
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    • 제19권7호
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    • pp.1460-1468
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    • 2005
  • Two possible shape memory processes, austenite to detwinned martensite transformation and twinned martensite to detwinned martensite transformation of a shape memory alloy have been modeled and examined. Eshelby's equivalent inclusion method with Mori-Tanaka's mean field theory is used for modeling of the shape memory processes of TiNi shape memory alloy reinforced aluminum matrix composite. The shape memory amount of shape memory alloy, plastic strain and residual stress in the matrix are computed and compared for the two processes. It is shown that the shape memory amount shows differences in a small prestrain region, but the plastic strain and the residual stress in the matrix show differences in the whole prestrain region. The shape memory process with initially martensitic state of the shape memory alloy would be favorable to the increase in the yield stress of the composite owing to the large compressive residual stress and plastic strain in the matrix.

고속 Viterbi 복호기를 위한 메모리 관리 (Memory management in hihg-speed viterbi decoders)

  • 임민중
    • 전자공학회논문지C
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    • 제35C권7호
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    • pp.30-36
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    • 1998
  • Memory management is one of the most important problems in implementing viterbi decoders. This paper introduces a novel traceback scheme for memory management of high-speed viterbi decoders. The new method balances the read and the write oeprations by inserting dummy write operations into the traceback process, resulting in simpler memory access schemes. It is suitable for VLSI implementation since it uses minimal memory requirements, it does not need global interconnections, and its address genration shceme for accessig memory contents is very simple.

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일반 싱글폴리 Nwell 공정에서 제작된 아날로그 메모리 (An Analog Memory Fabricated with Single-poly Nwell Process Technology)

  • 채용웅
    • 한국전자통신학회논문지
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    • 제7권5호
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    • pp.1061-1066
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    • 2012
  • 디지털 메모리는 신뢰성, 속도 그리고 상대적인 단순한 제어회로로 인해 지금까지 저장장치로서 널리 사용되어 왔다. 그러나 디지털 메모리 저장능력은 공정의 선폭감소의 한계로 인해 결국 한계에 다다르게 될 것이다. 이러한 저장 능력을 획기적으로 증가시키는 방안의 하나로서 메모리의 셀에 저장하는 데이터의 형태를 디지털에서 아날로그로 변화시키는 것이다. 한 개의 셀과 프로그래밍을 위한 주변회로로 구성된 아날로그 메모리가 0.16um 표준 CMOS 공정에서 제작되었다. 제작된 아날로그 메모리는 저밀도 불활성 메모리, SRAM과 DRAM에서 리던던시 회로 제어, ID나 보안코드 레지스터, 영상이나 음성 저장장치 등에 응용될 것이다.

메모리 상주 DBMS에서의 응용 트랜잭션 성능평가에 관한 연구 (A Study on the Performance Evaluation of Application Transaction in the Main Memory DBMS)

  • 김희완;이혜경
    • 디지털산업정보학회논문지
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    • 제5권4호
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    • pp.19-26
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    • 2009
  • Recently, the Main Memory DBMS is gradually being expanded by the appearance of a large capacity of a Main Memory System, the increase in business area where it requires a real time process, and the rise of the users' required level. The Main Memory DBMS, which is able to go through a large capacity data process of the disk-based DBMS and guarantees a high efficiency, has domestically developed and has been put to a practical use. This paper presents an examination of the applied technologies and the limits of Altibase system, which is Main Memory DBMS. Moreover, it evaluated and performed a comparative analysis on the performance level of the Main Memory DBMS and the disk-based DBMS based on the same application. After five trials of the experiment based on the operating application, it was confirmed that the performance level of the Main Memory DBMS is enhanced and is higher by 4.13 to 7.89 times than the disk-based DBMS.

LCTV를 이용한 실시간 광 연상 메모리의 구현 (Implementation of Real Time Optical Associative Memory using LCTV)

  • 정승우
    • 한국광학회:학술대회논문집
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    • 한국광학회 1990년도 제5회 파동 및 레이저 학술발표회 5th Conference on Waves and lasers 논문집 - 한국광학회
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    • pp.102-111
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    • 1990
  • In this thesis, an optical bidirectional inner-product associative memory model using liquid crystal television is proposed and analyzed theoretically and realized experimentally. The LCTV is used as a SLM(spatial light modulator), which is more practical than conventional SLMs, to produce image vector in terms of computer and CCD camera. Memory and input vectors are recorded into each LCTV through the video input connectors of it by using the image board. Two multi-focus hololenses are constructed in order to perform optical inner-product process. In forward process, the analog values of inner-products are measured by photodetectors and are converted to digital values which are enable to control the weighting values of the stored vectors by changing the gray levels of the pixels of the LCTV. In backward process, changed stored vectors are used to produce output image vector which is used again for input vector after thresholding. After some iterations, one of the stored vectors is retrieved which is most similar to input vector in other words, has the nearest hamming distance. The experimental results show that the proposed inner-product associative memory model can be realized optically and coincide well with the computer simulation.

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Bootstrap methods for long-memory processes: a review

  • Kim, Young Min;Kim, Yongku
    • Communications for Statistical Applications and Methods
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    • 제24권1호
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    • pp.1-13
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    • 2017
  • This manuscript summarized advances in bootstrap methods for long-range dependent time series data. The stationary linear long-memory process is briefly described, which is a target process for bootstrap methodologies on time-domain and frequency-domain in this review. We illustrate time-domain bootstrap under long-range dependence, moving or non-overlapping block bootstraps, and the autoregressive-sieve bootstrap. In particular, block bootstrap methodologies need an adjustment factor for the distribution estimation of the sample mean in contrast to applications to weak dependent time processes. However, the autoregressive-sieve bootstrap does not need any other modification for application to long-memory. The frequency domain bootstrap for Whittle estimation is provided using parametric spectral density estimates because there is no current nonparametric spectral density estimation method using a kernel function for the linear long-range dependent time process.

Gate CD Control for memory Chip using Total Process Proximity Based Correction Method

  • Nam, Byung--Ho;Lee, Hyung-J.
    • Journal of the Optical Society of Korea
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    • 제6권4호
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    • pp.180-184
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    • 2002
  • In this study, we investigated mask errors, photo errors with attenuated phase shift mask and off-axis illumination, and etch errors in dry etch conditions. We propose that total process proximity correction (TPPC), a concept merging every process step error correction, is essential in a lithography process when minimum critical dimension (CD) is smaller than the wavelength of radiation. A correction rule table was experimentally obtained applying TPPC concept. Process capability of controlling gate CD in DRAM fabrication should be improved by this method.

Flowable oxide CVD Process for Shallow Trench Isolation in Silicon Semiconductor

  • Chung, Sung-Woong;Ahn, Sang-Tae;Sohn, Hyun-Chul;Lee, Sang-Don
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권1호
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    • pp.45-51
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    • 2004
  • We have proposed a new shallow trench isolation (STI) process using flowable oxide (F-oxide) chemical vapor deposition (CVD) for DRAM application and it was successfully developed. The combination of F-oxide CVD and HDP CVD is thought to be the superior STI gap-filling process for next generation DRAM fabrication because F-oxide not only improves STI gap-filling capability, but also the reduced local stress by F-oxide in narrow trenches leads to decrease in junction leakage and gate induced drain leakage (GIDL) current. Finally, this process increased data retention time of DRAM compared to HDP STI. However, a serious failure occurred by symphonizing its structural dependency of deposited thickness with poor resistance against HF chemicals. It could be suppressed by reducing the flow time during F-oxide deposition. It was investigated collectively in terms of device yield. In conclusion, the combination of F-oxide and HDP oxide is the very promising technology for STI gap filling process of sub-100nm DRAM technology.

Development of intregrated process control system for plasma etching utilizing neural network and genetic algorithm

  • Koh, Taek-Beom;Cha, Sang-Yeob;Woo, Kwang-Bang;Moon, Dae-Sik;Kwak, Kyu-Hwao;Chang, Ho-Seung
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1995년도 Proceedings of the Korea Automation Control Conference, 10th (KACC); Seoul, Korea; 23-25 Oct. 1995
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    • pp.252-258
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    • 1995
  • The purpose of this study is to provide the integrated process control system, utilizing neural network modeling, to search for the appropriate choice input, and to keep the process output within the desired rang in the real etch process.

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